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W150H

更新时间: 2024-01-20 09:30:08
品牌 Logo 应用领域
SPECTRALINEAR 晶体外围集成电路光电二极管时钟
页数 文件大小 规格书
14页 231K
描述
440BX AGPset Spread Spectrum Frequency Synthesizer

W150H 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:ActiveReach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8541.40.20.00
风险等级:5.33其他特性:IC COMPATIBLE, HIGH RELIABILITY
颜色:HIGH EFFICIENCY RED/YELLOW颜色@波长:Orange/Yellow
配置:COMMON CATHODE, 2 ELEMENTS最大正向电流:0.03 A
最大正向电压:2.5 V透镜类型:DIFFUSED WHITE
标称发光强度:60.0/40.0 mcd安装特点:RADIAL MOUNT
功能数量:1端子数量:3
最高工作温度:85 °C最低工作温度:-40 °C
光电设备类型:DUAL COLOR LED总高度:6.22 mm
包装方法:BULK峰值波长:627/590 nm
最大反向电压:5 V形状:ROUND
尺寸:5 mm子类别:Visible LEDs
表面贴装:NOT代码:T-1 3/4
端子节距:1.27 mm视角:60 deg
Base Number Matches:1

W150H 数据手册

 浏览型号W150H的Datasheet PDF文件第7页浏览型号W150H的Datasheet PDF文件第8页浏览型号W150H的Datasheet PDF文件第9页浏览型号W150H的Datasheet PDF文件第11页浏览型号W150H的Datasheet PDF文件第12页浏览型号W150H的Datasheet PDF文件第13页 
W150  
DC Electrical Characteristics (TA = 0°C to +70°C; VDDQ3 = 3.3V 5ꢀ; VDDQ2 = 2.5V 5ꢀ) (continued)  
Parameter  
Description  
Test Condition  
Min.  
Typ.  
Max.  
Unit  
Crystal Oscillator  
VTH  
X1 Input threshold Voltage[6]  
VDDQ3 = 3.3V  
1.65  
14  
V
CLOAD  
Load Capacitance, Imposed on  
External Crystal[7]  
pF  
CIN,X1  
X1 Input Capacitance[8]  
Pin X2 unconnected  
Except X1 and X2  
28  
pF  
Pin Capacitance/Inductance  
CIN  
COUT  
LIN  
Input Pin Capacitance  
Output Pin Capacitance  
Input Pin Inductance  
5
6
7
pF  
pF  
nH  
AC Electrical Characteristics  
TA = 0°C to +70°C; VDDQ3 = 3.3V 5ꢀ; VDDQ2 = 2.5V 5ꢀ; fXTL  
= 14.31818 MHz. AC clock parameters are tested and  
guaranteed over stated operating conditions using the stated  
lump capacitive load at the clock output; Spread Spectrum  
clocking is disabled.  
CPU Clock Outputs, CPU_F, 1:2 (Lump Capacitance Test Load = 20 pF)  
CPU = 66.8 MHz  
CPU = 100 MHz  
Parameter  
tP  
Description  
Period  
Test Condition/Comments  
Measured on rising edge at 1.25  
Duration of clock cycle above 2.0V  
Duration of clock cycle below 0.4V  
Min. Typ. Max. Min. Typ. Max. Unit  
15  
5.2  
5.0  
1
15.5  
10  
3.0  
2.8  
1
10.5  
ns  
ns  
tH  
tL  
High Time  
Low Time  
ns  
tR  
tF  
tD  
Output Rise Edge Rate Measured from 0.4V to 2.0V  
Output Fall Edge Rate Measured from 2.0V to 0.4V  
4
4
4
4
V/ns  
V/ns  
1
1
Duty Cycle  
Measured on rising and falling edge at  
1.25V  
45  
55  
45  
55  
tJC  
Jitter, Cycle-to-Cycle  
Measured on rising edge at 1.25V.  
Maximum difference of cycle time  
between two adjacent cycles.  
250  
250  
ps  
tSK  
fST  
Output Skew  
Measured on rising edge at 1.25V  
175  
3
175  
3
ps  
Frequency Stabilization Assumes full supply voltage reached  
within 1 ms from power-up. Short cycles  
exist prior to frequency stabilization.  
ms  
from Power-up (cold  
start)  
Zo  
AC Output Impedance Average value during switching  
transition. Used for determining series  
termination value.  
20  
20  
:
PCI Clock Outputs, PCI_F and PCI0:5 (Lump Capacitance Test Load = 30 pF)  
CPU = 66.6/100 MHz  
Min. Typ. Max.  
30  
Parameter  
tP  
Description  
Test Condition/Comments  
Measured on rising edge at 1.5V  
Duration of clock cycle above 2.4V  
Duration of clock cycle below 0.4V  
Measured from 0.4V to 2.4V  
Unit  
Period  
ns  
ns  
tH  
tL  
High Time  
12.0  
12.0  
1
Low Time  
ns  
tR  
Output Rise Edge Rate  
4
V/ns  
Notes:  
6. X1 input threshold voltage (typical) is V  
/2.  
DDQ3  
7. The W150 contains an internal crystal load capacitor between pin X1 and ground and another between pin X2 and ground. Total load placed on crystal is 14 pF;  
this includes typical stray capacitance of short PCB traces to crystal.  
8. X1 input capacitance is applicable when driving X1 with an external clock source (X2 is left unconnected).  
tF  
Output Fall Edge Rate  
Measured from 2.4V to 0.4V  
1
4
V/ns  
Rev 1.0,November 24, 2006  
Page 10 of 14  

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