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W150H

更新时间: 2024-01-05 02:54:55
品牌 Logo 应用领域
SPECTRALINEAR 晶体外围集成电路光电二极管时钟
页数 文件大小 规格书
14页 231K
描述
440BX AGPset Spread Spectrum Frequency Synthesizer

W150H 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:ActiveReach Compliance Code:compliant
ECCN代码:EAR99HTS代码:8541.40.20.00
风险等级:5.33其他特性:IC COMPATIBLE, HIGH RELIABILITY
颜色:HIGH EFFICIENCY RED/YELLOW颜色@波长:Orange/Yellow
配置:COMMON CATHODE, 2 ELEMENTS最大正向电流:0.03 A
最大正向电压:2.5 V透镜类型:DIFFUSED WHITE
标称发光强度:60.0/40.0 mcd安装特点:RADIAL MOUNT
功能数量:1端子数量:3
最高工作温度:85 °C最低工作温度:-40 °C
光电设备类型:DUAL COLOR LED总高度:6.22 mm
包装方法:BULK峰值波长:627/590 nm
最大反向电压:5 V形状:ROUND
尺寸:5 mm子类别:Visible LEDs
表面贴装:NOT代码:T-1 3/4
端子节距:1.27 mm视角:60 deg
Base Number Matches:1

W150H 数据手册

 浏览型号W150H的Datasheet PDF文件第8页浏览型号W150H的Datasheet PDF文件第9页浏览型号W150H的Datasheet PDF文件第10页浏览型号W150H的Datasheet PDF文件第12页浏览型号W150H的Datasheet PDF文件第13页浏览型号W150H的Datasheet PDF文件第14页 
W150  
PCI Clock Outputs, PCI_F and PCI0:5 (Lump Capacitance Test Load = 30 pF) (continued)  
CPU = 66.6/100 MHz  
Parameter  
tD  
Description  
Duty Cycle  
Test Condition/Comments  
Min.  
Typ.  
Max.  
55  
Unit  
Measured on rising and falling edge at 1.5V  
45  
tJC  
Jitter, Cycle-to-Cycle  
Measured on rising edge at 1.5V. Maximum  
difference of cycle time between two  
adjacent cycles.  
250  
ps  
tSK  
tO  
Output Skew  
Measured on rising edge at 1.5V  
500  
4
ps  
ns  
CPU to PCI Clock Skew  
Covers all CPU/PCI outputs. Measured on  
rising edge at 1.5V. CPU leads PCI output.  
1.5  
fST  
Frequency Stabilization  
Assumes full supply voltage reached within  
3
ms  
from Power-up (cold start) 1 ms from power-up. Short cycles exist prior  
to frequency stabilization.  
Zo  
AC Output Impedance  
Average value during switching transition.  
Used for determining series termination  
value.  
15  
:
IOAPIC0 and IOAPIC_F Clock Outputs (Lump Capacitance Test Load = 20 pF)  
CPU = 66.6/100 MHz  
Parameter  
Description  
Frequency, Actual  
Output Rise Edge Rate  
Output Fall Edge Rate  
Duty Cycle  
Test Condition/Comments  
Frequency generated by crystal oscillator  
Measured from 0.4V to 2.0V  
Min.  
Typ.  
Max.  
Unit  
MHz  
V/ns  
V/ns  
f
14.31818  
tR  
1
1
4
4
tF  
Measured from 2.0V to 0.4V  
tD  
Measured on rising and falling edge at 1.25V  
45  
55  
1.5  
fST  
Frequency Stabilization  
Assumes full supply voltage reached within  
ms  
from Power-up (cold start) 1 ms from power-up. Short cycles exist prior to  
frequency stabilization.  
Zo  
AC Output Impedance  
Average value during switching transition.  
Used for determining series termination value.  
15  
:
REF0:1 Clock Outputs (Lump Capacitance Test Load = 20 pF)  
CPU = 66.6/100 MHz  
Parameter  
Description  
Test Condition/Comments  
Min.  
Typ. Max.  
Unit  
MHz  
V/ns  
V/ns  
f
Frequency, Actual  
Frequency generated by crystal oscillator  
14.318  
tR  
Output Rise Edge Rate Measured from 0.4V to 2.4V  
Output Fall Edge Rate Measured from 2.4V to 0.4V  
0.5  
0.5  
45  
2
2
tF  
tD  
Duty Cycle  
Measured on rising and falling edge at 1.5V  
55  
3
fST  
Frequency Stabilization Assumes full supply voltage reached within 1 ms from  
power-up. Short cycles exist prior to frequency stabili-  
zation.  
ms  
from Power-up (cold  
start)  
Zo  
AC Output Impedance Average value during switching transition. Used for  
determining series termination value.  
25  
:
SDRAM 0:15, _F Clock Outputs (Lump Capacitance Test Load = 30 pF)  
CPU = 66.8 MHz  
CPU = 100 MHz  
Parameter  
Description  
Period  
Test Condition/Comments  
Measured on rising edge at 1.5V  
Duration of clock cycle above 2.4V  
Duration of clock cycle below 0.4V  
Min. Typ. Max. Min. Typ. Max. Unit  
t
15  
5.2  
5.0  
1
15.5  
10  
3.0  
2.0  
1
10.5  
ns  
ns  
P
tH  
High Time  
Low Time  
tL  
tR  
tF  
ns  
Output Rise Edge Rate Measured from 0.4V to 2.4V  
Output Fall Edge Rate Measured from 2.4V to 0.4V  
4
4
4
4
V/ns  
V/ns  
1
1
Rev 1.0,November 24, 2006  
Page 11 of 14  

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