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VSP2262Y/2K PDF预览

VSP2262Y/2K

更新时间: 2024-11-08 11:13:31
品牌 Logo 应用领域
德州仪器 - TI 商用集成电路传感器
页数 文件大小 规格书
7页 774K
描述
适用于 CCD 传感器的 12 位 20MSPS 单通道 AFE | PT | 48 | -25 to 85

VSP2262Y/2K 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:QFP
包装说明:LFQFP,针数:48
Reach Compliance Code:compliantHTS代码:8542.39.00.01
Factory Lead Time:1 week风险等级:5.06
商用集成电路类型:CONSUMER CIRCUITJESD-30 代码:S-PQFP-G48
JESD-609代码:e4长度:7 mm
湿度敏感等级:1功能数量:1
端子数量:48最高工作温度:85 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:LFQFP封装形状:SQUARE
封装形式:FLATPACK, LOW PROFILE, FINE PITCH峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:1.6 mm
最大供电电压 (Vsup):3.6 V最小供电电压 (Vsup):2.7 V
表面贴装:YES技术:CMOS
温度等级:OTHER端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:7 mmBase Number Matches:1

VSP2262Y/2K 数据手册

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VSP2262  
VSP2262  
www.ti.com  
CCD SIGNAL PROCESSOR for  
DIGITAL CAMERAS  
FEATURES  
DESCRIPTION  
CCD SIGNAL PROCESSING:  
The VSP2262 is a complete mixed-signal processing  
IC for digital cameras, providing signal conditioning  
and Analog-to-Digital (A/D) conversion for the output  
of a CCD array. The primary CCD channel provides  
Correlated Double Sampling (CDS) to extract video  
information from the pixels, –6dB to +42dB gain  
range with digital control for varying illumination  
conditions, and black level clamping for an accurate  
black level reference. Input signal clamping and offset  
correction of the input CDS are also performed. The  
stable gain control is linear in dB. Additionally, the  
black level is quickly recovered after gain change. The  
VSP2262Y is available in an LQFP-48 package and  
operates from a single +3V/+3.3V supply.  
Correlated Double Sampling (CDS)  
Programmable Black Level Clamping  
PROGRAMMABLE GAIN AMPLIFIER (PGA):  
–6dB to +42dB Gain Ranging  
12-BIT DIGITAL DATA OUTPUT:  
Up to 20MHz Conversion Rate  
No Missing Codes  
79dB SIGNAL-TO-NOISE RATIO  
PORTABLE OPERATION:  
Low Voltage: 2.7V to 3.6V  
Low Power: 83mW (typ) at 3.0V  
Stand-By Mode: 6mW  
RESET  
VCC  
CLPDM  
SHP SHD  
SLOAD SCLK SDATA  
ADCCK  
DRVDD  
Serial Interface  
Input  
Clamp  
Timing  
Control  
Correlated  
Double  
Sampling  
(CDS)  
Programmable  
Gain  
Amplifier  
(PGA)  
Analog-  
to-  
Digital  
B[11:0]  
12-Bit  
Digital  
Output  
CCDIN  
–6dB  
to  
+42dB  
Output  
Latch  
Converter  
CCD  
Output  
Signal  
Optical Black (OB)  
Level Clamping  
Reference Voltage Generator  
Preblanking  
COB  
BYPP2  
BYP  
BYPM  
REFN  
CM  
REFP  
DRVGND  
GNDA  
CLPOB  
PBLK  
Copyright © 2000, Texas Instruments Incorporated  
SBMS011  
Printed in U.S.A. November, 2000  

VSP2262Y/2K 替代型号

型号 品牌 替代类型 描述 数据表
VSP2262Y TI

完全替代

适用于 CCD 传感器的 12 位 20MSPS 单通道 AFE | PT | 48 |
VSP2232Y TI

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