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VSP1021 PDF预览

VSP1021

更新时间: 2024-11-13 22:15:19
品牌 Logo 应用领域
德州仪器 - TI /
页数 文件大小 规格书
17页 244K
描述
3-V, 10-BIT, 25-MSPS, LOW-POWER AREA CCD ANALOG FRONT END

VSP1021 数据手册

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ꢀ ꢁꢂ ꢃ ꢄꢅꢃ  
ꢆ ꢇꢀꢈ ꢃ ꢄ ꢇꢉꢊ ꢋꢈ ꢅ ꢌ ꢇꢍꢁ ꢂꢁꢈ ꢎ ꢏ ꢐꢇ ꢂꢏ ꢐꢑ ꢒ  
ꢓꢒꢑ ꢓ ꢔꢔꢕ ꢓꢖꢓ ꢎꢏ ꢗ ꢘ ꢒꢏ ꢖ ꢋ ꢑ ꢖꢕ  
SLES016C− FEBRUARY 2002 − REVISED MARCH 2004  
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Serial Interface for Register Configuration  
features  
Programmable Black-Level and Offset  
Calibration  
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10-Bit, 25-MSPS, Analog-to-Digital  
Converter (ADC)  
Analog Gain Implementation With Specified  
No Missing Code, Even At High Gains  
Single Power Supply Operation, 2.7 V to  
3.3 V  
Additional Digital-to-Analog Converters  
(DACs) for External Analog Setting  
Low Power: 95 mW at 2.7 V, Power-Down  
Mode: 1 mW  
D
Internal Reference Voltages  
Full-Channel Differential-Nonlinearity Error:  
< 0.5 LSB Typical  
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Programmable Internal-Timing Signal  
Delays  
Full-Channel Integral-Nonlinearity Error:  
< 1.5 LSB Typical  
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48-Terminal TQFP Package  
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Dual Input Modes: CCD and Video  
applications  
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Programmable-Gain Amplifier (PGA) With  
0-dB to 36-dB Gain Range (0.047 dB/Step)  
for CCD Mode, 0-dB to 12-dB Gain Range  
(0.047 dB/Step) for Video Mode  
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Digital Still Camera  
Digital Camcorder  
Digital Video Camera  
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description  
The VSP1021 device is a highly-integrated monolithic analog-signal processor/digitizer designed to interface  
the area charge-coupled-device (CCD) sensors in digital-camera and camcorder applications. The VSP1021  
device performs all the analog processing functions necessary to maximize the dynamic range, corrects various  
errors associated with the CCD sensor, and then digitizes the results with an on-chip, high-speed ADC. The key  
components of the VSP1021 device include:  
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Input clamp circuitry and a correlated double sampler (CDS)  
Programmable-gain amplifier (PGA) with 0-dB to 36-dB gain range for CCD mode and 0-dB to 12-dB range  
for video mode  
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Two internal DACs for automatic or programmable optical-black-level and offset calibration  
10-bit, 25-MSPS pipeline ADC for CCD mode and a 28-MSPS ADC for video mode  
Parallel data port for easy microprocessor interface and a serial port for configuring internal control registers  
Two additional DACs for external system control  
Internal reference voltages  
The VSP1021 device is designed using advanced CMOS process and operates from a single 3-V power supply  
with a normal power consumption of just 95 mW, and 1 mW in power-down mode.  
High throughput rate, single 3-V operation, very-low-power consumption, and fully-integrated analog-  
processing circuitry make the VSP1021 device an ideal CCD and video-signal-processing solution for electronic  
video-camcorder applications.  
This device is available in a 48-terminal TQFP package and is specified over an operating temperature range  
of –20°C to 75°C.  
AVAILABLE OPTIONS  
T
PACKAGE TQFP (PFB)  
A
−20°C to 75°C  
VSP1021PFB  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢋꢥ  
Copyright 2004, Texas Instruments Incorporated  
ꢡ ꢥ ꢢ ꢡꢚ ꢛꢯ ꢝꢜ ꢠ ꢨꢨ ꢦꢠ ꢞ ꢠ ꢟ ꢥ ꢡ ꢥ ꢞ ꢢ ꢪ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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