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VSP1221PBR PDF预览

VSP1221PBR

更新时间: 2024-11-15 19:42:23
品牌 Logo 应用领域
德州仪器 - TI 转换器
页数 文件大小 规格书
26页 384K
描述
IC,DATA ACQ SIGNAL CONDITIONER,1-CHANNEL,12-BIT,CMOS,TQFP,64PIN,PLASTIC

VSP1221PBR 技术参数

生命周期:Obsolete包装说明:QFP, TQFP64,.63SQ,32
Reach Compliance Code:unknown风险等级:5.84
最大模拟输入电压:3 V转换器类型:D/A CONVERTER
JESD-30 代码:S-PQFP-G64最大线性误差 (EL):0.12%
模拟输入通道数量:1位数:12
端子数量:64最高工作温度:70 °C
最低工作温度:-20 °C封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装等效代码:TQFP64,.63SQ,32
封装形状:SQUARE封装形式:FLATPACK
电源:3 V认证状态:Not Qualified
子类别:Other Converters标称供电电压:3 V
表面贴装:YES技术:CMOS
温度等级:COMMERCIAL端子形式:GULL WING
端子节距:0.8 mm端子位置:QUAD
Base Number Matches:1

VSP1221PBR 数据手册

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SLES012 – SEPTEMBER 2001  
D
D
D
D
Single 3-V Supply Operation  
features  
DNL: <±0.5 LSB and  
INL: <±1.5 LSB Typical at 0-dB Gain  
D
D
D
12-Bit, 21-MSPS, Analog-to-Digital  
Converter  
Programmable-Gain Range: 0 dB to 36 dB,  
Gain Resolution of 0.05 dB/Step  
Very-Low Power: 70 mW Minimum  
Power-Down Mode: 4 mW  
48-Pin TQFP Package  
Very-Low Input-Referred Noise: 75-dB SNR  
Typical at 0-dB Gain  
applications  
D
Novel Optical-Black (OB) Calibration  
Low-Aperture Delay  
D
Digital Still Camera, Digital Video Camera  
D
description  
The VSP1221 is a highly-integrated mixed-signal IC used for signal conditioning and analog-to-digital  
conversion at the output of a CCD array. The IC has a correlated double sampler (CDS) and an analog  
programmable-gain amplifier (PGA) stage followed by an analog-to-digital converter (ADC) and a digital PGA  
stage. The CDS is used to sample the CCD signal and is followed by the analog PGA stage. The ADC is a12-bit,  
21-MSPS pipelined ADC. The digital PGA provides further amplification.  
Additionally, there is an offset calibration loop for optical-black correction. The optical-black reference level is  
user-programmable. The chip also has two eight-bit digital-to-analog converters (DAC) for external analog  
setting.  
The chip has a serial port for configuring internal control registers.  
The VSP1221 is available in a 48-pin TQFP package and operates from a single 3-V power supply.  
pin assignments  
PACKAGE  
(TOP VIEW)  
48 47 46 45 44 43 42 41 40 39 38 37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
DACO2  
AVSS  
DACO1  
AVDD  
TP2  
PIN  
DIN  
TP1  
CLREF  
AVDD  
AVSS  
VSS  
D0/SDO  
D1  
1
2
3
4
5
6
7
8
9
D2  
D3  
D4  
D5  
D6  
D7  
D8  
D9 10  
D10  
D11  
11  
12  
13 14 15 16 17 18 19 20 21 22 23 24  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2001, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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