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VRS51L1050-25-QG-ISPV3 PDF预览

VRS51L1050-25-QG-ISPV3

更新时间： 2024-11-13 20:27:39
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 微控制器
页数 文件大小 规格书
49页 505K
描述
Microcontroller,

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VRS51L1050-25-QG-ISPV3 技术参数

生命周期：ActiveReach Compliance Code：compliant
风险等级：5.52具有ADC：NO
地址总线宽度：16位大小：8
CPU系列：8051DAC 通道：NO
DMA 通道：NO外部数据总线宽度：8
JESD-30 代码：S-PQFP-G44长度：10 mm
I/O 线路数量：36端子数量：44
最高工作温度：70 °C最低工作温度：
PWM 通道：YES封装主体材料：PLASTIC/EPOXY
封装代码：LQFP封装等效代码：QFP44,.52SQ,32
封装形状：SQUARE封装形式：FLATPACK, LOW PROFILE
电源：3.3 V认证状态：Not Qualified
RAM（字节）：1024ROM（单词）：65536
ROM可编程性：FLASH速度：25 MHz
子类别：Microcontrollers最大压摆率：10 mA
最大供电电压：3.6 V最小供电电压：3 V
标称供电电压：3.3 V表面贴装：YES
温度等级：COMMERCIAL端子形式：GULLWING
端子节距：0.8 mm端子位置：QUAD
宽度：10 mmBase Number Matches：1

VRS51L1050-25-QG-ISPV3 数据手册

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VRS51L1050  
Preliminary Datasheet  
Rev 1.2  
Versa 8051 3.3V MCU with 64KB of IAP/ISP Flash  
Overview  
Feature Set  
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8051/8052 pin compatible  
64KB on-chip Flash memory  
The VRS51L1050 is based on the standard 8051  
microcontroller family architecture and is pin  
compatible drop-in replacement for most 8051 MCUs.  
a
In-System/In-Application Flash Programming (ISP/IAP)  
On-chip Charge Pump for Flash Programming  
1024 Bytes on-chip Data SRAM  
Four 8-bit I/O Ports, one 4-bit I/O Port  
2 PWM Outputs on P1.2 to P1.3 (8/5-bit resolution)  
1 Full Duplex UART Serial Port  
I²C-compatible Interface  
Three 16-bit Timers/Counters  
Bit Operation Instruction  
8-bit Unsigned Division and Multiply  
BCD Arithmetic  
Direct and Indirect Addressing  
7 Interrupt Sources and 2 Levels of Interrupt Priority  
Power saving modes  
Wakeup from Power Down by Ext. Interrupt or Reset  
Code protection function  
Low EMI (inhibit ALE)  
Commercial Temperature Range (0°C to +70°C)  
3.3V Operating Voltage  
The VRS51L1050 is designed for applications that  
require a large amount of program/data memory with  
non-volatile data storage and/or code/field based  
firmware  
upgrade  
capability  
coupled  
with  
comprehensive peripheral support. It features 64KB of  
In-System/In-Application Programmable Flash memory,  
1KB of SRAM, an I²C-compatible interface, 2 PWM  
output channels, a UART, three 16-bit timers and the  
ability to exit the power down mode upon assertion of  
an external interrupt (INT0 / INT1).  
Ideal  
for  
battery-powered  
applications,  
the  
VRS51L1050 registers and I/Os maintain their current  
value in power down mode while the oscillator is  
disabled, enabling the supply current to drop below  
20uA.  
FIGURE 2: VRS51L1050 QFP-44 AND PLCC-44 PIN OUT DIAGRAMS  
The VRS51L1050 is available with firmware that  
enables In-System Programming (firmware based boot-  
loader) of the Flash memory via the UART interface  
(ISPVx version). General Flash memory programming  
is supported by device programmers available from  
Ramtron or other 3rd party suppliers.  
33  
23  
22  
34  
P0.3/AD3  
P0.2/AD2  
P0.1/AD1  
P0.0/AD0  
VDD  
P2.4/A12  
P2.3/A11  
P2.2/A10  
P2.1/A9  
P2.0/A8  
P4.0  
The VRS51L1050 is available in PLCC-44, QFP-44 and  
DIP-40 packages and functions over the commercial  
temperature range.  
VRS51L1050  
QFP-44  
P4.2  
T2/P1.0  
VSS  
T2EX/P1.1  
PWM0/P1.2  
PWM1/P1.3  
P1.4  
XTAL1  
XTAL2  
#RD/P3.7  
#WR/P3.6  
FIGURE 1: VRS51L1050 FUNCTIONAL DIAGRAM  
44  
12  
11  
1
64KB  
FLASH  
8051  
PROCESSOR  
ADDRESS/  
DATA BUS  
1024 Bytes of  
SRAM  
PORT 0  
8
8
8
8
4
I2C  
PORT 1  
PORT 2  
PORT 3  
PORT 4  
6
1
40  
7
39  
P1.5  
SCL/P1.6  
SDA/P1.7  
RES  
P0.4/AD4  
P0.5/AD5  
P0.6/AD6  
UART  
P0.7/AD7  
#EA  
RXD/P3.0  
P4.3  
VRS51L1050  
PLCC-44  
P4.1  
2 INTERRUPT  
INPUTS  
TXD/P3.1  
#INT0/P3.2  
#INT1/P3.3  
T0/P3.4  
ALE  
#PSEN  
P2.7/A15  
P2.6/A14  
P2.5/A13  
TIMER 0  
TIMER 1  
TIMER 2  
T1/P3.5  
17  
29  
28  
18  
POWER  
CONTROL  
RESET  
PWM  
2
Ramtron International Corporation  
1850 Ramtron Drive Colorado Springs  
Colorado, USA, 80921  
http://www.ramtron.com  
MCU customer service: 1-800-943-4625, 1-514-871-2447 x 208  
1-800-545-FRAM, 1-719-481-7000  
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