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VP2450N3-GP013 PDF预览

VP2450N3-GP013

更新时间: 2024-02-29 12:00:26
品牌 Logo 应用领域
超科 - SUPERTEX 输入元件开关晶体管
页数 文件大小 规格书
6页 695K
描述
Small Signal Field-Effect Transistor,

VP2450N3-GP013 技术参数

是否Rohs认证: 符合生命周期:Transferred
包装说明:CYLINDRICAL, O-PBCY-T3Reach Compliance Code:unknown
风险等级:5.62其他特性:HIGH INPUT IMPEDANCE
配置:SINGLE WITH BUILT-IN DIODE最小漏源击穿电压:500 V
最大漏极电流 (ID):0.1 A最大漏源导通电阻:30 Ω
FET 技术:METAL-OXIDE SEMICONDUCTOR最大反馈电容 (Crss):20 pF
JEDEC-95代码:TO-92JESD-30 代码:O-PBCY-T3
元件数量:1端子数量:3
工作模式:ENHANCEMENT MODE最高工作温度:150 °C
最低工作温度:-55 °C封装主体材料:PLASTIC/EPOXY
封装形状:ROUND封装形式:CYLINDRICAL
极性/信道类型:P-CHANNEL功耗环境最大值:0.74 W
最大功率耗散 (Abs):0.74 W表面贴装:NO
端子形式:THROUGH-HOLE端子位置:BOTTOM
晶体管应用:SWITCHING晶体管元件材料:SILICON
Base Number Matches:1

VP2450N3-GP013 数据手册

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Supertex inc.  
VP2450  
P-Channel Enhancement-Mode  
Vertical DMOS FET  
Features  
General Description  
Free from secondary breakdown  
Low power drive requirement  
Ease of paralleling  
This low threshold, enhancement-mode (normally-off)  
transistor utilizes a vertical DMOS structure and Supertex’s  
well-proven, silicon-gate manufacturing process. This  
combination produces a device with the power handling  
capabilities of bipolar transistors and the high input impedance  
and positive temperature coefficient inherent in MOS devices.  
Characteristic of all MOS structures, this device is free  
from thermal runaway and thermally-induced secondary  
breakdown.  
Low CISS and fast switching speeds  
High input impedance and high gain  
Excellent thermal stability  
Integral source-to-drain diode  
Applications  
Motor controls  
Converters  
Supertex’s vertical DMOS FETs are ideally suited to a wide  
range of switching and amplifying applications where very  
low threshold voltage, high breakdown voltage, high input  
impedance, low input capacitance, and fast switching speeds  
are desired.  
Amplifiers  
Switches  
Power supply circuits  
Drivers (relays, hammers, solenoids, lamps,  
memories, displays, bipolar transistors, etc.)  
Ordering Information  
Product Summary  
RDS(ON)  
ID(ON)  
Part Number  
Package Option  
Packing  
VGS(th)  
(max)  
BVDSS/BVDGS  
(max)  
(min)  
VP2450N3-G  
3-Lead TO-92  
1000/Bag  
-500V  
30Ω  
-200mA  
-0.4V  
VP2450N3-G P002  
VP2450N3-G P003  
Pin Configuration  
VP2450N3-G P005 3-Lead TO-92  
VP2450N3-G P013  
2000/Reel  
2000/Reel  
DRAIN  
VP2450N3-G P014  
VP2450N3-G  
TO-243AA (SOT-89)  
DRAIN  
-G denotes a lead (Pb)-free / RoHS compliant package.  
Contact factory for Wafer / Die availablity.  
Devices in Wafer / Die form are lead (Pb)-free / RoHS compliant.  
SOURCE  
SOURCE  
DRAIN  
GATE  
GATE  
Absolute Maximum Ratings  
Parameter  
TO-92  
TO-243AA (SOT-89)  
Value  
BVDSS  
BVDGS  
±20V  
Drain-to-source voltage  
Drain-to-gate voltage  
Product Marking  
SiVP  
2 4 5 0  
YYWW  
YY = Year Sealed  
WW = Week Sealed  
= “Green” Packaging  
Gate-to-source voltage  
Operating and storage temperature  
-55OC to +150OC  
Absolute Maximum Ratings are those values beyond which damage to the device  
may occur. Functional operation under these conditions is not implied. Continuous  
operation of the device at the absolute rating level may affect device reliability. All  
voltages are referenced to device ground.  
Package may or may not include the following marks: Si or  
TO-92  
Typical Thermal Resistance  
W = Code for week sealed  
VP4EW  
Package  
θja  
= “Green” Packaging  
Package may or may not include the following marks: Si or  
TO-243AA (SOT-89)  
TO-92  
132OC/W  
133OC/W  
TO-243AA (SOT-89)  
Doc.# DSFP-VP2450  
B082613  
Supertex inc.  
www.supertex.com  

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