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VL-MM9-2EBN PDF预览

VL-MM9-2EBN

更新时间: 2024-11-29 12:24:19
品牌 Logo 应用领域
其他 - ETC 动态存储器双倍数据速率
页数 文件大小 规格书
13页 220K
描述
2GB 256Mx64 DDR3 SDRAM LOW VOLTAGE NON-ECC UNBUFFERED SODIMM 204-PIN

VL-MM9-2EBN 数据手册

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Product Specifications  
PART NO.:  
REV: 1.0  
VL47D5763A-K0SD-S1  
General Information  
2GB 256Mx64 DDR3 SDRAM LOW VOLTAGE NON-ECC UNBUFFERED SODIMM 204-PIN  
Description  
The VL47D5763A is a 256Mx64 DDR3 SDRAM high density SODIMM. This single rank memory module consists of  
eight CMOS 256Mx8 bits with 8 banks DDR3 Synchronous DRAMs in BGA packages and a 2K EEPROM with  
thermal sensor in an 8-pin MLF package. This module is a 204-pin small-outline dual in-line memory module and is  
intended for mounting into an edge connector socket. Decoupling capacitors are mounted on the printed circuit board  
for each DDR3 SDRAM.  
Features  
Pin Description  
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204-pin, small-outline dual in-line memory module (SODIMM)  
Fast data transfer rate: PC3-12800  
Pin Name  
A0~A14  
A10/AP  
A12/BC#  
BA0~BA2  
DQ0~DQ63  
DQS0~DQS7  
DQS0#~DQS7#  
DM0~DM7  
CK0,CK0#  
ODT0  
Function  
Address Inputs  
VDD = VDDQ = 1.35V (1.28V~1.45V) & 1.5V (1.425V~1.575V)  
JEDEC standard 1.35V (1.28V~1.45V) & 1.5V (1.425V~1.575V)  
VDDSPD = 3.0V to 3.6V  
Eight internal component banks for concurrent operation  
8-bit pre-fetch architecture  
Bi-directional differential data-strobe  
Nominal and dynamic on-die termination (ODT)  
ZQ calibration support  
Programmable CAS# latency: 11 (DDR3-1600)  
Programmable burst; length (8)  
Average refresh period 7.8 us  
Asynchronous reset  
Fly-by topology  
Address Input/ Autoprecharge  
Address Input/ Burst Chop  
Bank Address Inputs  
Data Input/Output  
Data Strobes  
Data Strobes Complement  
Data Masks  
Clock Input  
On-die Termination Control  
Clock Enables  
CKE0  
On board terminated command, address, and control bus  
Serial presence detect (SPD) EEPROM with thermal sensor  
Thermal sensor range: -40oC to +125oC (Max +/-3oC accuracy)  
Lead-free, RoHS compliant  
CS0#  
Chip Selects  
RAS#  
Row Address Strobes  
Column Address Strobes  
Write Enable  
CAS#  
Gold edge contacts  
WE#  
PCB: Height 30.00mm (1.181”), double sided component  
Operating temperature (TOPER): -40oC to +95oC (module screening using  
commercial DRAM)  
VDD  
Voltage Supply  
VSS  
Ground  
Notes: Double refresh rate is required when 85oC < TOPER <= 95oC.  
TOPER is DRAM case temperature (Tc).  
SA0~SA1  
SDA  
SPD Address  
SPD Data Input/Output  
SPD Clock Input  
SCL  
EVENT#  
VREFCA  
VREFDQ  
VDDSPD  
VTT  
Temperature Event Output  
Reference Voltage for CA  
Reference Voltage for DQ  
SPD Voltage Supply  
Termination Voltage  
Register and SDRAM Control  
No Connect  
Order Information:  
VL47D5763A - K0 S D-S1  
OPERATING TEMPERATURE  
S1: Industrial screening  
RESET#  
NC  
DRAM DIE  
D-DIE  
DRAM MANUFACTURER  
S - SAMSUNG  
MODULE SPEED  
K0: PC3-12800 @ CL11  
VL: Lead-free/RoHS  
DRAM component: Samsung K4B2G0846D-HYK0  
Tel 949.888.2444 – 30052 Tomas, Rancho Santa Margarita, CA 92688 USA www.virtium.com  
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