Datasheet > VL-MM9-4SBN

VL-MM9-4SBN

更新时间： 2024-11-29 12:24:19

品牌	Logo	应用领域
其他 - ETC		动态存储器双倍数据速率
页数	文件大小	规格书
14页	146K
描述
4GB 512Mx64 DDR3 SDRAM LOW VOLTAGE NON-ECC UNBUFFERED SODIMM 204-PIN

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VL-MM9-4SBN 数据手册

Product Specifications

PART NO.:

REV: 1.2

VL47D5263A-K0/K9/F8/E7SD

General Information

4GB 512Mx64 DDR3 SDRAM LOW VOLTAGE NON-ECC UNBUFFERED SODIMM 204-PIN

Description

The VL47D5263A is a 512Mx64 DDR3 SDRAM high density SODIMM. This dual rank memory module consists of

sixteen CMOS 256Mx8 bits with 8 banks DDR3 synchronous DRAMs in BGA packages and a 2K EEPROM in an 8-

pin MLF package. This module is a 204-pin small-outline dual in-line memory module and is intended for mounting

into an edge connector socket. Decoupling capacitors are mounted on the printed circuit board for each DDR3

SDRAM.

Features

Pin Description



204-pin, small-outline dual in-line memory module (SODIMM)

Pin Name

A0~A14

Function

Fast data transfer rates: PC3-12800, PC3-10600, PC3-8500, PC3-6400

VDD = VDDQ = 1.35V (1.28V~1.45V) & 1.5V (1.425V~1.575V)

JEDEC standard 1.35V (1.28V~1.45V) & 1.5V (1.425V~1.575V)

VDDSPD = 3.0V to 3.6V

Eight internal component banks for concurrent operation

8-bit pre-fetch architecture

Bi-directional differential data-strobe

Nominal and dynamic on-die termination (ODT)

ZQ calibration support

Programmable CAS# latency:

11 (DDR3-1600), 9 (DDR3-1333), 7 (DDR3-1066), 6 (DDR3-800)

Programmable burst; length (8)

Average refresh period 7.8 us

Asynchronous reset

Fly-by topology

On board terminated command, address, and control bus

Serial presence detect (SPD) EEPROM with thermal sensor

Thermal sensor range: -40^oC to +125^oC (Max +/-3^oC accuracy)

Lead-free, RoHS compliant

Address Inputs

A10/AP

Address Input/ Autoprecharge

Address Input/ Burst Chop

Bank Address Inputs

Data Input/Output

A12/BC#

BA0~BA2

DQ0~DQ63

DQS0~DQS7

DQS0#~DQS7#

DM0~DM7

Data Strobes

Data Strobes Complement

Data Masks

CK0,CK0#,

CK1,CK1#



Clock Input

ODT0, ODT1

CKE0, CKE1

CS0#, CS1#

RAS#

On-die Termination Control

Clock Enables

Chip Selects

Row Address Strobes

Column Address Strobes

Write Enable

CAS#

WE#

Gold edge contacts

VDD

Voltage Supply

PCB: Height 30.00mm (1.181”), double sided component

Operating temperature (TOPER): - Commercial (0^oC <= Tc <= 95^oC)

- Industrial (-40^oC <= Tc <= 95^oC)

Notes: Double refresh rate is required when 85^oC < TOPER <= 95^oC.

TOPER is DRAM case temperature (Tc).

VSS

Ground

SA0~SA1

SDA

SPD Address

SPD Data Input/Output

SPD Clock Input

SCL

EVENT#

VREFCA

VREFDQ

VDDSPD

VTT

Temperature Event Output

Reference Voltage for CA

Reference Voltage for DQ

SPD Voltage Supply

Termination Voltage

No Connect

Order Information:

VL47D5263A-K0 S D-X

OPERATING TEMPERATURE

None: Commercial

S1: Industrial screening

RESET#

DRAM DIE

D-DIE

DRAM MANUFACTURER

S - SAMSUNG

MODULE SPEED

K0: PC3-12800 @ CL11

K9: PC3-10600 @ CL9

F8: PC3-8500 @ CL7

E7: PC3-6400 @ CL6

VL: Lead-free/RoHS

DRAM component: Samsung K4B2G0846D-HYK0

Tel 949.888.2444 – 30052 Tomas, Rancho Santa Margarita, CA 92688 USA – www.virtium.com

12 3 4 5 6 7...14

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