5秒后页面跳转
捷配首页

Datasheet > 逻辑 > 触发器/锁存器> V62/03652-01YE
V62/03652-01YE PDF预览

V62/03652-01YE

更新时间： 2024-01-02 21:40:55
品牌 Logo 应用领域
德州仪器 - TI 触发器锁存器逻辑集成电路光电二极管
页数 文件大小 规格书
10页 452K
描述
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP WITH CLEAR AND PRESET

阅读下载

中文翻译

获取价格

V62/03652-01YE 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active零件包装代码：SOIC
包装说明：GREEN, SOIC-14针数：14
Reach Compliance Code：compliantHTS代码：8542.39.00.01
Factory Lead Time：6 weeks风险等级：5.26
Is Samacsys：N系列：AHC/VHC/H/U/V
JESD-30 代码：R-PDSO-G14JESD-609代码：e4
长度：8.65 mm负载电容（CL）：50 pF
逻辑集成电路类型：D FLIP-FLOP最大频率@ Nom-Sup：75000000 Hz
最大I（ol）：0.008 A湿度敏感等级：1
位数：1功能数量：2
端子数量：14最高工作温度：125 °C
最低工作温度：-55 °C输出极性：COMPLEMENTARY
封装主体材料：PLASTIC/EPOXY封装代码：SOP
封装等效代码：SOP14,.25封装形状：RECTANGULAR
封装形式：SMALL OUTLINE包装方法：TR
峰值回流温度（摄氏度）：260电源：2/5.5 V
最大电源电流（ICC）：0.02 mAProp。Delay @ Nom-Sup：17.5 ns
传播延迟（tpd）：17.5 ns认证状态：Not Qualified
座面最大高度：1.75 mm子类别：FF/Latches
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：2 V
标称供电电压 (Vsup)：3.3 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子面层：Nickel/Palladium/Gold (Ni/Pd/Au)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：NOT SPECIFIED触发器类型：POSITIVE EDGE
宽度：3.91 mm最小 fmax：110 MHz
Base Number Matches：1

V62/03652-01YE 数据手册

 浏览型号V62/03652-01YE的Datasheet PDF文件第2页浏览型号V62/03652-01YE的Datasheet PDF文件第3页浏览型号V62/03652-01YE的Datasheet PDF文件第4页浏览型号V62/03652-01YE的Datasheet PDF文件第5页浏览型号V62/03652-01YE的Datasheet PDF文件第6页浏览型号V62/03652-01YE的Datasheet PDF文件第7页 
SN74AHC74-EP  
DUAL POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP  
WITH CLEAR AND PRESET  
SCLS489 – JUNE 2003  
D OR PW PACKAGE  
(TOP VIEW)  
Controlled Baseline  
– One Assembly/Test Site, One Fabrication  
Site  
1CLR  
1D  
V
CC  
2CLR  
2D  
1
2
3
4
5
6
7
14  
13  
12  
11  
10  
9
Extended Temperature Performance of  
–55°C to 125°C  
1CLK  
1PRE  
1Q  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
2CLK  
2PRE  
2Q  
Enhanced Product-Change Notification  
1Q  
†
Qualification Pedigree  
8
GND  
2Q  
EPIC (Enhanced-Performance Implanted  
CMOS) Process  
Operating Range 2-V to 5.5-V V  
CC  
Latch-Up Performance Exceeds 250 mA Per  
JESD 17  
ESD Protection Exceeds 2000 V Per  
MIL-STD-883, Method 3015; Exceeds 200 V  
Using Machine Model (C = 200 pF, R = 0)  
†
Component qualification in accordance with JEDEC and industry  
standards to ensure reliable operation over an extended  
temperature range. This includes, but is not limited to, Highly  
Accelerated Stress Test (HAST) or biased 85/85, temperature  
cycle, autoclave or unbiased HAST, electromigration, bond  
intermetallic life, and mold compound life. Such qualification  
testing should not be viewed as justifying use of this component  
beyond specified performance and environmental limits.  
description/ordering information  
The SN74AHC74 dual positive-edge-triggered device is a D-type flip-flop.  
A low level at the preset (PRE) or clear (CLR) inputs sets or resets the outputs, regardless of the levels of the  
other inputs. When PRE and CLR are inactive (high), data at the data (D) input meeting the setup time  
requirements is transferred to the outputs on the positive-going edge of the clock pulse. Clock triggering occurs  
at a voltage level and is not directly related to the rise time of the clock pulse. Following the hold-time interval,  
data at the D input can be changed without affecting the levels at the outputs.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
‡
PACKAGE  
T
A
SOIC – D  
Tape and reel  
Tape and reel  
SN74AHC74MDREP  
SN74AHC74MPWREP  
AHC74MEP  
AHC74EP  
–55°C to 125°C  
TSSOP – PW  
‡
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
EPIC is a trademark of Texas Instruments.  
Copyright 2003, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265  
1234567...10

中文翻译

下载PDF

V62/03652-01YE 替代型号

型号 品牌 替代类型 描述 数据表
SN74AHC74MDREP TI

完全替代

 Enhanced Product Dual Positive-Edge-Triggered D-Type Flip-Flops With Clear And Preset 14-S
74VHC74M FAIRCHILD

功能相似

 Dual D-Type Flip-Flop with Preset and Clear

与V62/03652-01YE相关器件

型号 品牌 获取价格 描述 数据表
V62/03653-01XE TI

获取价格

 		QUADRUPLE 2-INPUT POSITIVE-NAND GATES
V62/03653-01YE TI

获取价格

 		QUADRUPLE 2-INPUT POSITIVE-NAND GATES
V62/03654-01XE TI

获取价格

 		QUADRUPLE 2-INPUT POSITIVE-AND GATE
V62/03654-01YE TI

获取价格

 		QUADRUPLE 2-INPUT POSITIVE-AND GATE
V62/03655-01XE TI

获取价格

 		3-LINE TO 8-LINE DECODER/DEMULTIPLEXER
V62/03655-01YE TI

获取价格

 		3-LINE TO 8-LINE DECODER/DEMULTIPLEXER
V62/03656-01XE TI

获取价格

 		HEX SCHMITT-TRIGGER INVERTER
V62/03656-01YE TI

获取价格

 		HEX SCHMITT-TRIGGER INVERTER
V62/03657-01XE TI

获取价格

 		OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS
V62/03657-01YE TI

获取价格

 		OCTAL BUFFER/DRIVER WITH 3-STATE OUTPUTS

与V62/03652-01YE相关文章

您还可以找


热门产品
PCB打样/小批量
铝基板
BOM智能配单
PCBA制造
钣金
精密CNC
模具注塑
薄膜开关
精选活动
PCBA打样特惠
四六层板品质升级
铝基板品质升级
一体化电子制造
DFM下载
服务支持
企业认证
产品展示
工厂展示
工艺能力
积分商城
关于捷配
捷配简介
企业文化
公司动态
人才招聘
联系我们
帮助中心
下单流程
付款流程
开票流程
常见问题
全球PCB制造服务专线 400-613-0088

工作时间：9:00-21:00

CEO邮箱：ceo@jiepei.com

投诉邮箱：tousu@jiepei.com

捷配网-微信公众号 微信公众号
捷配网-微信公众号 抖音公众号
资质认证：
合作快递：
支付方式：
Copyright © 2024 Jiepei.com Inc. All Rights Reserved. 版权所有:杭州捷配信息科技有限公司 浙公网安备 33010502006866号 浙ICP备10014259号-119 营业执照ICP证