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V43648Y04VCTG-10PC PDF预览

V43648Y04VCTG-10PC

更新时间: 2024-11-23 22:15:35
品牌 Logo 应用领域
MOSEL 内存集成电路动态存储器时钟
页数 文件大小 规格书
10页 148K
描述
3.3 VOLT 8M x 64 HIGH PERFORMANCE 100 MHZ SDRAM UNBUFFERED SODIMM

V43648Y04VCTG-10PC 技术参数

生命周期:Obsolete零件包装代码:MODULE
包装说明:DIMM, DIMM144,32针数:144
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.32.00.28风险等级:5.84
Is Samacsys:N访问模式:FOUR BANK PAGE BURST
最长访问时间:6 ns其他特性:AUTO/SELF REFRESH
最大时钟频率 (fCLK):100 MHzI/O 类型:COMMON
JESD-30 代码:R-XDMA-N144内存密度:536870912 bit
内存集成电路类型:SYNCHRONOUS DRAM MODULE内存宽度:64
功能数量:1端口数量:1
端子数量:144字数:8388608 words
字数代码:8000000工作模式:SYNCHRONOUS
最高工作温度:70 °C最低工作温度:
组织:8MX64输出特性:3-STATE
封装主体材料:UNSPECIFIED封装代码:DIMM
封装等效代码:DIMM144,32封装形状:RECTANGULAR
封装形式:MICROELECTRONIC ASSEMBLY电源:3.3 V
认证状态:Not Qualified刷新周期:4096
座面最大高度:31.75 mm自我刷新:YES
最大待机电流:0.024 A子类别:DRAMs
最大压摆率:0.44 mA最大供电电压 (Vsup):3.6 V
最小供电电压 (Vsup):3 V标称供电电压 (Vsup):3.3 V
表面贴装:NO技术:CMOS
温度等级:COMMERCIAL端子形式:NO LEAD
端子节距:0.8 mm端子位置:DUAL
Base Number Matches:1

V43648Y04VCTG-10PC 数据手册

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PRELIMINARY  
V43648Y04V(C)TG-10PC  
3.3 VOLT 8M x 64 HIGH PERFORMANCE  
100 MHZ SDRAM  
MOSEL VITELIC  
UNBUFFERED SODIMM  
Features  
Description  
The V43648Y04V(C)TG-10PC memory module  
is organized 8,388,608 x 64 bits in a 144 pin  
SODIMM. The 8M x 64 memory module uses 8  
Mosel-Vitelic 4M x 16 SDRAM. The x64 modules  
are ideal for use in high performance computer  
systems where increased memory density and fast  
access times are required.  
JEDEC-standard 144 pin, Small-Outline, Dual in  
line Memory Module (SODIMM)  
Serial Presence Detect with E PROM  
Nonbuffered  
Fully Synchronous, All Signals Registered on  
Positive Edge of System Clock  
Single +3.3V (± 0.3V) Power Supply  
All Device Pins are LVTTL Compatible  
4096 Refresh Cycles every 64 ms  
Self-Refresh Mode  
Internal Pipelined Operation; Column Address  
can be changed every System Clock  
Programmable Burst Lengths: 1, 2, 4, 8 or Full  
Page  
2
Speed  
Grade  
Part Number  
Configuration  
V43648Y04V(C)TG-10PC  
-10PC  
8M x 64  
(100 MHz)  
Auto Precharge and Piecharge all Banks by A10  
Data Mask Function by DQM  
Mode Register Set Programming  
Programmable (CAS Latency: 2, 3 Clocks)  
4M x 16  
4M x 16  
4M x 16  
4M x 16  
1
59  
61  
143  
Pin 2 on Backside  
Pin 144 on Backside  
V43648Y04V(C)TG-10PC Rev. 1.7 October 2000  
1

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