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UT1553BRTIGCA

更新时间: 2024-11-29 21:53:35
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其他 - ETC /
页数 文件大小 规格书
52页 1271K
描述
RTI Remote Terminal Interface

UT1553BRTIGCA 数据手册

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UT1553B RTI Remote Terminal Interface  
Operational status available via dedicated lines or  
FEATURES  
internal status register  
Complete MIL-STD-1553B Remote Terminal  
ASD/ENASC (formerly SEAFAC) tested and  
interface compliance  
approved  
Dual-redundant data bus operation supported  
Available in ceramic 84-lead leadless chip carrier and  
Internal illegalization of selected mode code  
84-pin pingrid array  
commands  
Full military operating temperature range, -55°C to  
+125°C, screened to the specific test methods listed in  
Table I of MIL-STD-883, Method 5004, Class B  
External illegal command definition capability  
Automatic DMA control and address generation  
JAN-qualified devices available  
MODE CODE/  
SUB ADDRESS  
HOST  
SYSTEM  
ADDRESS  
INPUTS  
ILLEGAL  
COMMAND  
DECODER  
CHANNEL  
A
IN  
MEMORY  
ADDRESS  
CONTROL  
A
OUTPUT EN  
OUT  
COMMAND  
RECOGNITION  
LOGIC  
MEMORY  
ADDRESS  
OUTPUTS  
DECODER  
CHANNEL  
B
CONTROL  
INPUTS  
CONTROL  
AND  
ERROR LOGIC  
CONTROL  
OUTPUTS  
IN  
B
TIMEOUT  
TIMERON  
12MHz  
MUX  
DATA  
TRANSFER  
LOGIC  
CLOCK AND  
RESET LOGIC  
ENCODER  
OUT  
RESET  
16  
2MHz  
DATA I/O BUS  
Figure 1. UT1553B RTI Functional Block Diagram  
RTI-1  

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