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UPD784928YGF-XXX-3BA PDF预览

UPD784928YGF-XXX-3BA

更新时间： 2024-10-14 14:45:27
品牌 Logo 应用领域
日电电子 - NEC 时钟微控制器外围集成电路
页数 文件大小 规格书
96页 495K
描述
Microcontroller, 16-Bit, MROM, MOS, PQFP100, 14 X 20 MM, PLASTIC, QFP-100

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UPD784928YGF-XXX-3BA 技术参数

是否Rohs认证： 不符合生命周期：Obsolete
零件包装代码：QFP包装说明：QFP,
针数：100Reach Compliance Code：compliant
HTS代码：8542.31.00.01风险等级：5.84
具有ADC：YES地址总线宽度：
位大小：16最大时钟频率：16 MHz
DAC 通道：NODMA 通道：NO
外部数据总线宽度：JESD-30 代码：R-PQFP-G100
JESD-609代码：e0长度：20 mm
I/O 线路数量：74端子数量：100
最高工作温度：70 °C最低工作温度：-10 °C
PWM 通道：YES封装主体材料：PLASTIC/EPOXY
封装代码：QFP封装形状：RECTANGULAR
封装形式：FLATPACK峰值回流温度（摄氏度）：NOT SPECIFIED
认证状态：Not QualifiedROM可编程性：MROM
座面最大高度：3 mm最大供电电压：5.5 V
最小供电电压：4.5 V标称供电电压：5 V
表面贴装：YES技术：MOS
温度等级：COMMERCIAL端子面层：TIN LEAD
端子形式：GULL WING端子节距：0.65 mm
端子位置：QUAD处于峰值回流温度下的最长时间：NOT SPECIFIED
宽度：14 mmuPs/uCs/外围集成电路类型：MICROCONTROLLER
Base Number Matches：1

UPD784928YGF-XXX-3BA 数据手册

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DATA SHEET  
MOS INTEGRATED CIRCUIT  
µPD784927, 784928, 784927Y, 784928Y  
16-BIT SINGLE-CHIP MICROCONTROLLER  
DESCRIPTION  
The µPD784927 and 784928 are members of the NEC 78K/IV Series of microcontrollers equipped with a high-  
speed, high-performance 16-bit CPU for VCR software servo control.  
The µPD784927Y and 784928Y are based on the µPD784928 with the addition of an I2C bus interface compatible  
with multi-master.  
They contain many peripheral hardware units ideal for VCR control, such as a multi-function timer unit (super timer  
unit) for software servo control and VCR analog circuits.  
Flash memory models, the µPD78F4928 and µPD78F4928Y, are under development.  
The functions of the µPD784927 is described in detail in the following User’s Manual. Be sure to read this  
manual before designing your system.  
µPD784928, 784928Y Subseries User’s Manual - Hardware  
: U12648E  
: U10905E  
78K/IV Series User’s Manual - Instruction  
FEATURES  
High instruction execution speed realized by 16-bit CPU core  
•
•
Minimum instruction execution time: 250 ns (with 8 MHz internal clock)  
High internal memory capacity  
•
Part Number  
Item  
µPD784927, 784927Y  
96K bytes  
µPD784928, 784928Y  
128K bytes  
Internal ROM capacity  
Internal RAM capacity  
2048 bytes  
3584 bytes  
VCR analog circuits conforming to VHS Standard  
•
•
•
•
CTL amplifier  
•
•
•
DFG amplifier  
DPG amplifier  
•
•
Reel FG comparator (2 channels)  
CSYNC comparator  
RECCTL driver (rewritable)  
CFG amplifier  
DPFG separation circuit (ternary separation circuit)  
Timer unit (super timer unit) for servo control  
•
•
•
•
•
•
•
•
•
Serial interface : 3 channels  
3-wire serial I/O : 2 channels  
I2C bus interface: 1 channel  
A/D converter: 12 channels (conversion time: 10 µs)  
Low-frequency oscillation mode: main system clock frequency = internal clock frequency  
Low-power consumption mode: CPU can operate with a subsystem clock.  
Supply voltage range: VDD = +2.7 to 5.5 V  
Hardware watch function: watch operation at low voltage (VDD = 2.7 V (MIN.)) and low current consumption  
Unless otherwise specified, the µPD784927 is treated as the representative model throughout this document.  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local NEC representative for availability  
and additional information.  
The mark shows major revised points.  
Document No. U12255EJ2V0DS00 (2nd edition)  
Date Published December 1999 N CP(K)  
Printed in Japan  
1997,1999  
©
1234567...96

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