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UPD784214AYGC-XX-8EU PDF预览

UPD784214AYGC-XX-8EU

更新时间: 2024-10-14 15:56:11
品牌 Logo 应用领域
瑞萨 - RENESAS 时钟ISM频段外围集成电路
页数 文件大小 规格书
100页 561K
描述
16-BIT, MROM, 12.5MHz, MICROCONTROLLER, PQFP100, 14 X 14 MM, FINE PITCH, PLASTIC, LQFP-100

UPD784214AYGC-XX-8EU 技术参数

生命周期:Active零件包装代码:QFP
包装说明:14 X 14 MM, FINE PITCH, PLASTIC, LQFP-100针数:100
Reach Compliance Code:compliantHTS代码:8542.31.00.01
风险等级:5.48Is Samacsys:N
具有ADC:YES其他特性:CAN ALSO OPERATE AT 1.8V MIN SUPPLY
地址总线宽度:20位大小:16
最大时钟频率:12.5 MHzDAC 通道:YES
DMA 通道:NO外部数据总线宽度:8
JESD-30 代码:S-PQFP-G100JESD-609代码:e6
长度:14 mmI/O 线路数量:86
端子数量:100最高工作温度:85 °C
最低工作温度:-40 °CPWM 通道:YES
封装主体材料:PLASTIC/EPOXY封装代码:LFQFP
封装形状:SQUARE封装形式:FLATPACK, LOW PROFILE, FINE PITCH
峰值回流温度(摄氏度):260认证状态:Not Qualified
ROM可编程性:MROM座面最大高度:1.6 mm
速度:12.5 MHz最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:YES技术:MOS
温度等级:INDUSTRIAL端子面层:TIN BISMUTH
端子形式:GULL WING端子节距:0.5 mm
端子位置:QUAD处于峰值回流温度下的最长时间:10
宽度:14 mmuPs/uCs/外围集成电路类型:MICROCONTROLLER
Base Number Matches:1

UPD784214AYGC-XX-8EU 数据手册

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DATA SHEET  
MOS INTEGRATED CIRCUIT  
µ
PD784214A, 784215A, 784216A, 784217A, 784218A, 784214AY, 784215AY, 784216AY, 784217AY, 784218AY  
16-BIT SINGLE-CHIP MICROCONTROLLERS  
DESCRIPTION  
The µPD784214A, 784215A, 784216A, 784217A, and 784218A are products of the µPD784216A/784218A  
Subseries in the 78K/IV Series. Besides a high-speed and high performance CPU, these controllers have ROM,  
RAM, I/O ports, 8-bit resolution A/D and D/A converters, timers, serial interfaces, a real-time output port, interrupt  
functions, and various other peripheral hardware.  
The µPD784214AY, 784215AY, 784216AY, 784217AY, and 784218AY are based on the µPD784216Y/784218Y  
Subseries with the addition of a multimaster-supporting I2C bus interface.  
The µPD78F4218A and 78F4218AY, products with a flash memory instead of the internal ROM of mask ROM  
versions, and various development tools are also available.  
Detailed function descriptions are provided in the following user’s manuals. Be sure to read them before  
designing.  
µPD784216A, 784216AY Subseries User’s Manual Hardware: U13570E  
µPD784218A, 784218AY Subseries User’s Manual Hardware: U12970E  
78K/IV Series User’s Manual Instructions:  
U10905E  
FEATURES  
78K/IV Series  
Supply voltage: V  
DD = 1.8 to 5.5 V  
Inherits peripheral functions of µPD78078, 78078Y  
Subseries  
Standby function  
HALT/STOP/IDLE mode  
Minimum instruction execution time  
160 ns  
In low-power consumption mode: HALT/IDLE mode  
(with subsystem clock)  
(@fXX = 12.5 MHz operation with main system clock)  
61 µs  
(@fXT = 32.768 kHz operation with subsystem clock)  
I/O port: 86 pins  
Clock division function  
Watch timer: 1 channel  
Watchdog timer: 1 channel  
Clock output function  
Timer/event counter:  
Selectable from f  
f
Buzzer output function  
Selectable from f  
XX, fXX/2, fXX/22, fXX/23, fXX/24, fXX/25,  
16-bit timer/event counter × 1 unit  
8-bit timer/event counter × 6 units  
Serial interface: 3 channels  
XX/26, fXX/27, fXT  
XX/210, fXX/211, fXX/212, fXX/213  
UART/IOE (3-wire serial I/O): 2 channels  
CSI (3-wire serial I/O, I2C bus supporting  
multimaster Note): 2 channels  
A/D converter: 8-bit resolution × 8 channels  
D/A converter: 8-bit resolution × 2 channels  
Note µPD784216AY/784218AY Subseries only  
APPLICATIONS  
Cellular phones, PHS, cordless telephones, CD-ROM, AV equipment  
Unless otherwise specified, references in this document to the µPD784218A, 784218AY refer to the  
µPD784214A, 784215A, 784216A, 784217A, 784218A, 784214AY, 784215AY, 784216AY, 784217AY, and  
784218AY.  
The information in this document is subject to change without notice. Before using this document, please  
confirm that this is the latest version.  
Not all devices/types available in every country. Please check with local NEC representative for  
availability and additional information.  
The mark shows major revised points.  
Document No. U14121EJ2V0DS00 (2nd edition)  
Date Published August 2000 N CP(K)  
Printed in Japan  
2000  

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