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UPD4702G-A PDF预览

UPD4702G-A

更新时间: 2024-11-13 13:15:15
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日电电子 - NEC 计数器编码器
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16页 168K
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UPD4702G-A 数据手册

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DATA SHEET  
MOS INTEGRATED CIRCUIT  
µPD4702  
INCREMENTAL ENCODER 8-BIT UP/DOWN COUNTER  
CMOS INTEGRATED CIRCUITS  
DESCRIPTION  
The µPD4702 is 8-bit up/down counters for an incremental encoder. Two-phase (A, B) incremental input signals  
are phase-differentiated, and on each signal edge, an up-count is executed if the A phase is leading, or a down-count  
if the B phase is leading. Eight-bit count data is output in real time. A carry output and borrow output are also  
provided for counter overflow and underflow.  
The µPD4704 is also available; use of these enables the count width to be extended.  
PIN CONFIGURATION (Top View)  
FEATURES  
Incremental inputs (A, B)  
On-chipphasediscriminationcircuit(up-countmode  
when the phase order is A B, down-count mode  
when B A) 4-multiplication count method  
On-chip edge detection circuit  
Reset  
A
1
20  
19  
18  
17  
16  
15  
14  
13  
12  
11  
V
DD  
2
Carry  
Borrow  
STB  
B
3
NC  
4
8-bit up/down counter latch output o Carry output,  
borrow output  
CD  
CD  
CD  
CD  
0
5
OE  
1
2
3
6
CD  
CD  
CD  
CD  
NC  
7
6
5
Count data output controllable (3-state output)  
CMOS, single +5 V power supply  
7
8
ORDERING INFORMATION  
NC  
9
4
VSS  
10  
Part Number  
Package  
µPD4702C  
µPD4702G  
20-pin plastic DIP  
(300 mil)  
(300 mil)  
20-pin plastic SOP  
PIN NAMES  
A
2-phase incremental signal inputs  
B
Reset : Counter reset input  
STB  
OE  
: Latch strobe signal input  
: Output control signal input  
: Count data outputs  
CD0-7  
Carry : Carry pulse output  
Borrow : Borrow pulse output  
Document No. IC-3304A (2nd edition)  
(O. D. No. IC-5403A)  
Date Published April 1997 P  
Printed in Japan  
1993  
©

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