Datasheet > UPD44165082AF5-E50-EQ2

UPD44165082AF5-E50-EQ2

更新时间： 2024-11-25 07:46:51

品牌	Logo	应用领域
日电电子 - NEC		静态存储器
页数	文件大小	规格书
40页	377K
描述
QDR SRAM, 2MX8, 0.45ns, CMOS, PBGA165, 13 X 15 MM, PLASTIC, BGA-165

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DATA SHEET

MOS INTEGRATED CIRCUIT

PD44165082A, 44165092A, 44165182A, 44165362A

18M-BIT QDR^TMII SRAM

2-WORD BURST OPERATION

Description

The μPD44165082A is a 2,097,152-word by 8-bit, the μPD44165092A is a 2,097,152-word by 9-bit, the μPD44165182A

is a 1,048,576-word by 18-bit and the μPD44165362A is a 524,288-word by 36-bit synchronous quad data rate static RAM

fabricated with advanced CMOS technology using full CMOS six-transistor memory cell.

The μPD44165082A, μPD44165092A, μPD44165182A and μPD44165362A integrate unique synchronous

peripheral circuitry and a burst counter. All input registers controlled by an input clock pair (K and K#) are latched on

the positive edge of K and K#.

These products are suitable for application which require synchronous operation, high speed, low voltage, high density

and wide bit configuration.

These products are packaged in 165-pin PLASTIC BGA.

Features

• 1.8 ± 0.1 V power supply

• 165-pin PLASTIC BGA (13 x 15)

• HSTL interface

• PLL circuitry for wide output data valid window and future frequency scaling

• Separate independent read and write data ports with concurrent transactions

• 100% bus utilization DDR READ and WRITE operation

• Two-tick burst for low DDR transaction size

• Two input clocks (K and K#) for precise DDR timing at clock rising edges only

• Two output clocks (C and C#) for precise flight time and clock skew matching-clock

and data delivered together to receiving device

• Internally self-timed write control

• Clock-stop capability. Normal operation is restored in 1,024 cycles after clock is resumed.

• User programmable impedance output

• Fast clock cycle time : 4.0 ns (250 MHz), 5.0 ns (200 MHz)

• Simple control logic for easy depth expansion

• JTAG boundary scan

<R>

• Operating ambient temperature : Commercial T^A= 0 to +70°C (-E40, -E50)

Industrial

T^A= –40 to +85°C (-E40Y, -E50Y)

The information in this document is subject to change without notice. Before using this document, please

confirm that this is the latest version.

Not all products and/or types are available in every country. Please check with an NEC Electronics

sales representative for availability and additional information.

Document No. M17770EJ3V0DS00 (3rd edition)

Date Published February 2007 NS CP(N)

Printed in Japan

2006

The mark <R> shows major revised points.

The revised points can be easily searched by copying an "<R>" in the PDF file and specifying it in the "Find what:" field.

12 3 4 5 6 7...40

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与UPD44165082AF5-E50-EQ2相关器件

型号	品牌	获取价格	描述	数据表
UPD44165082AF5-E50-EQ2-A	NEC	获取价格	QDR SRAM, 2MX8, 0.45ns, CMOS, PBGA165, 13 X 15 MM, LEAD FREE, PLASTIC, BGA-165
UPD44165082AF5-E50-EQ2-A	RENESAS	获取价格	2MX8 QDR SRAM, 0.45ns, PBGA165, 13 X 15 MM, LEAD FREE, PLASTIC, BGA-165
UPD44165082AF5-E50Y-EQ2	NEC	获取价格	QDR SRAM, 2MX8, 0.45ns, CMOS, PBGA165, 13 X 15 MM, PLASTIC, BGA-165
UPD44165082AF5-E50Y-EQ2-A	RENESAS	获取价格	2MX8 QDR SRAM, 0.45ns, PBGA165, 13 X 15 MM, LEAD FREE, PLASTIC, BGA-165
UPD44165082F5-E50-EQ1	NEC	获取价格	18M-BIT QDRII SRAM 2-WORD BURST OPERATION
UPD44165082F5-E60-EQ1	NEC	获取价格	18M-BIT QDRII SRAM 2-WORD BURST OPERATION
UPD44165082F5-E75-EQ1	NEC	获取价格	18M-BIT QDRII SRAM 2-WORD BURST OPERATION
UPD44165084	NEC	获取价格	18M-BIT QDRII SRAM 4-WORD BURST OPERATION
UPD44165084AF5-E33-EQ2-A	RENESAS	获取价格	2MX8 QDR SRAM, 0.45ns, PBGA165, 13 X 15 MM, LEAD FREE, PLASTIC, BGA-165
UPD44165084AF5-E37Y-EQ2-A	RENESAS	获取价格	2MX8 QDR SRAM, 0.45ns, PBGA165, 13 X 15 MM, LEAD FREE, PLASTIC, BGA-165

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