Datasheet > UG120

UG120

更新时间： 2024-01-11 00:22:09

品牌	Logo	应用领域
爱特美尔 - ATMEL		/
页数	文件大小	规格书
7页	39K
描述
0.6um ULC Series

阅读下载

中文翻译

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

UG120 数据手册

UG Series

0.6µm ULC Series

Description

The UG series of ULCs is well suited for conversion of

medium- to-large sized CPLDs and FPGAs. Devices are

implemented in high-performance CMOS technology

with 0.6-µm (drawn) channel lengths, and are capable of

supporting flip-flop toggle rates of 350 MHz, operating

clock frequencies up to 150 MHz and input to output

delays as fast as 5 ns.

a very low standby consumption of 0.4 nA/gate

typically, which would yield a standby current of 4 mA

on a 10,000 gate design. Operating consumption is a

strict function of clock frequency, which typically

results in a power reduction of 50% to 90% depending

on the device being compared.

The UG series provides several options for output

buffers, including a variety of drive levels up to 24 mA.

Schmitt trigger inputs are also an option. A number of

techniques are used for improved noise immunity and

reduced EMC emissions, including: several

independent power supply busses and internal

decoupling for isolation; slew rate limited outputs are

also available as required.

The architecture of the UG series allows for efficient

conversion of many PLD architectures and FPGA

device types. A compact RAM cell, along with the large

number of available gates allows the implementation of

RAM in FPGA architectures that support this feature, as

well as JTAG boundary-scan and scan-path testing.

Conversion to the UG series of ULC can provide a

significant reduction in operating power when

compared to the original PLD or FPGA. This is

especially true when compared to many PLD and CPLD

architecture devices, which typically consume 100 mA

or more even when not being clocked. The UG series has

The UG series is designed to allow conversions of high

performance 3.3V devices as well as 5.0V devices.

Support of mixed supply conversions is also possible,

allowing optimal trade-offs between speed and power

consumption.

Features

D High performance ULC family suitable for

medium- to large-sized CPLDs and FPGAs

D Conversions to over 200,000 FPGA gates

D Pin counts to over 300 pins

D High speed performance:

–

250-ps typical cell delay

350-MHz toggle rate

D Full range of packages: DIP, SOIC, LCC/PLCC,

D Any pin-out matched due to limited number of

PQFP/TQFP, PGA/PPGA

dedicated pads

D Advanced 0.6-µm (drawn)/0.45-µm (effective)

feature size

D 3.3V and/or 5.0V operation.

D Low quiescent current: 0.4 nA/gate

D Available in commercial, industrial, automotive,

military and space grades.

D Triple-layer or dual-layer metal CMOS

technology

Rev. B – 25 May. 98

5–1

12 3 4 5 6 7

中文翻译

下载PDF

与UG120相关器件

型号	品牌	获取价格	描述	数据表
UG1212-A-R1	ETC	获取价格	Distinctive features and specifications
UG-1215	AMPHENOL	获取价格	RF Connector, Female, Panel Mount, Cable Mount, Clamp Terminal, Jack
UG-127	ADI	获取价格	Evaluation Board for High Speed Op Amps
UG-128	ADI	获取价格	Evaluation Board User Guide
UG-129	ADI	获取价格	Universal Evaluation Board for Dual High Speed Op Amps in MSOP Packages
UG12HT	VISHAY	获取价格	Ultrafast Rectifiers
UG12HT-E3	VISHAY	获取价格	DIODE 12 A, 500 V, SILICON, RECTIFIER DIODE, TO-220AC, LEAD FREE, PLASTIC PACKAGE-2, Recti
UG12HT-E3/45	VISHAY	获取价格	DIODE 12 A, 500 V, SILICON, RECTIFIER DIODE, TO-220AC, ROHS COMPLIANT, PLASTIC PACKAGE-2,
UG12HTHE3/45	VISHAY	获取价格	DIODE 12 A, 500 V, SILICON, RECTIFIER DIODE, TO-220AC, ROHS COMPLIANT, PLASTIC PACKAGE-2,
UG12JT	VISHAY	获取价格	Ultrafast Rectifiers

与UG120相关文章

共享储能电站：数据驱动与政策引领下的黄金机遇
2024-06-26

9
US1M数据手册解读：产品特性、替换型号推荐
2024-06-26

3
解析BAV99LT1G手册：参数分析、替换型号推荐
2024-06-26

3
解读BSS138PW数据手册：产品特性、电气参数及替换型号推荐
2024-06-26

5

产品中心

服务支持

精选活动

关于我们

帮助中心

UG120

UG120 数据手册

与UG120相关器件

与UG120相关文章

您还可以找

产品中心

服务支持

精选活动

关于我们

帮助中心

UG120

UG120 数据手册

与UG120相关器件

与UG120相关文章

您还可以找

您在本页遇到什么问题？