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UCC3880-6 PDF预览

UCC3880-6

更新时间: 2024-11-25 22:39:59
品牌 Logo 应用领域
德州仪器 - TI 控制器
页数 文件大小 规格书
8页 340K
描述
Pentium Pro Controller

UCC3880-6 数据手册

 浏览型号UCC3880-6的Datasheet PDF文件第2页浏览型号UCC3880-6的Datasheet PDF文件第3页浏览型号UCC3880-6的Datasheet PDF文件第4页浏览型号UCC3880-6的Datasheet PDF文件第5页浏览型号UCC3880-6的Datasheet PDF文件第6页浏览型号UCC3880-6的Datasheet PDF文件第7页 
UCC2880-4/-5/-6  
UCC3880-4/-5/-6  
PRELIMINARY  
Pentium® Pro Controller  
FEATURES  
DESCRIPTION  
Combined DAC/Voltage  
The UCC3880-4/-5/-6 combines high precision reference and voltage monitor-  
ing circuitry with average current mode PWM controller circuitry to power Intel  
Pentium Pro and other high-end microprocessors with a minimum of external  
components. The UCC3880-x converts 5VDC to an adjustable output, ranging  
from 2.0VDC to 3.5VDC in 100mV steps with 1% DC system accuracy.  
Monitor and PWM Functions  
4-Bit Digital-to-Analog  
Converter (DAC)  
1.0% DAC/Reference  
The chip includes a precision 5V reference which is capable of sourcing cur-  
rent to an external load. The output voltage of the DAC is derived from this  
reference, and is programmed directly by Intel’s VID pins (Table 1).  
Low Offset X20 Current Sense  
Amplifier  
The accuracy of the DAC/reference combination is 1.0%. The overvoltage and  
undervoltage comparators monitor the system output voltage and indicate  
when it rises above or falls below its programmed value by more than 7.5%. A  
second overvoltage protection comparator pulls the current amplifier output  
voltage low to force zero duty cycle when the system output voltage exceeds  
its designed value by more than 15%. This comparator also terminates the cy-  
cle. Undervoltage lockout circuitry assures the correct logic states at the out-  
puts during powerup and powerdown. Grounding the ENABLE pin forces the  
GATE output low.  
100kHz, 200kHz, 400kHz  
Oscillator Frequency Options  
Foldback Current Limiting  
Overvoltage and Undervoltage  
Fault Windows  
Undervoltage Lockout  
2Totem Pole Output  
Chip Disable Function  
(continued)  
BLOCK DIAGRAM  
UDG-96106-1  
10/96  

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