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ꢊ ꢋ ꢌ ꢍꢋ ꢌ ꢎꢏ ꢁꢀꢏ ꢏꢎꢐꢑ ꢒ ꢋꢓ ꢎ ꢍꢀꢔ ꢕꢆꢍ ꢀꢊ ꢊ ꢍ ꢌꢒ
SGLS183 − AUGUST 2003
D
Qualification in Accordance With
AEC-Q100
D
On-Chip Error Amplifier With 2-MHz Gain
Bandwidth Product
†
D
Qualified for Automotive Applications
D
On Chip VDD Clamping
D
Customer-Specific Configuration Control
Can Be Supported Along With
Major-Change Approval
D
Output Drive Stages Capable of 500-mA
Peak-Source Current, 1-A Peak-Sink
Current
D PACKAGE
(TOP VIEW)
D
ESD Protection Exceeds 1500 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
1
2
3
4
8
7
6
5
VDD
COMP
FB
D
D
Dual Output Drive Stages in Push-Pull
Configuration
OUTA
OUTB
GND
CS
RC
Current Sense Discharge Transistor to
Improve Dynamic Response
D
D
D
D
130-µA Typical Starting Current
1-mA Typical Run Current
Operation to 1 MHz
PW PACKAGE
(TOP VIEW)
1
8
7
6
5
OUTA
VDD
COMP
FB
OUTB
GND
RC
Internal Soft Start
2
3
4
†
Contact factory for details. Q100 qualification data available on
request.
CS
description
The UCC2808A is a family of BiCMOS push-pull, high-speed, low-power, pulse-width modulators. The
UCC2808A contains all of the control and drive circuitry required for off-line or dc-to-dc fixed frequency
current-mode switching power supplies with minimal external parts count.
The UCC2808A dual output drive stages are arranged in a push-pull configuration. Both outputs switch at half
the oscillator frequency using a toggle flip-flop. The dead time between the two outputs is typically 60 ns to
200 ns depending on the values of the timing capacitor and resistors, thus limiting each output stage duty cycle
to less than 50%.
The UCC2808A family offers a variety of package options and choice of undervoltage lockout levels. The family
has UVLO thresholds and hysteresis options for off-line and battery powered systems. Thresholds are shown
in the ordering information table.
The UCC2808A is an enhanced version of the UCC2808 family. The significant difference is that the A versions
feature an internal discharge transistor from the CS pin to ground, which is activated each clock cycle during
the oscillator dead time. The feature discharges any filter capacitance on the CS pin during each cycle and helps
minimize filter capacitor values and current sense delay.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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Copyright 2003 Texas Instruments Incorporated
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1
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