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UCC2808APWTR-1G4 PDF预览

UCC2808APWTR-1G4

更新时间: 2024-11-28 15:55:55
品牌 Logo 应用领域
罗彻斯特 - ROCHESTER 信息通信管理开关光电二极管
页数 文件大小 规格书
14页 500K
描述
Switching Controller, Current-mode, 1A, 1000kHz Switching Freq-Max, BICMOS, PDSO8, GREEN, TSSOP-8

UCC2808APWTR-1G4 技术参数

生命周期:Contact Manufacturer包装说明:TSSOP,
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.72
Is Samacsys:N模拟集成电路 - 其他类型:SWITCHING CONTROLLER
控制模式:CURRENT-MODE控制技术:PULSE WIDTH MODULATION
最大输入电压:13 V最小输入电压:9 V
标称输入电压:10 VJESD-30 代码:R-PDSO-G8
长度:4.4 mm功能数量:1
端子数量:8最高工作温度:85 °C
最低工作温度:-40 °C最大输出电流:1 A
封装主体材料:PLASTIC/EPOXY封装代码:TSSOP
封装形状:RECTANGULAR封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
座面最大高度:1.2 mm表面贴装:YES
切换器配置:PUSH-PULL最大切换频率:1000 kHz
技术:BICMOS温度等级:INDUSTRIAL
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL宽度:3 mm
Base Number Matches:1

UCC2808APWTR-1G4 数据手册

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SLUS456D − APRIL 1999 - REVISED AUGUST 2002  
D OR N PACKAGE  
(TOP VIEW)  
D
D
D
D
D
D
D
Dual Output Drive Stages in Push-Pull  
Configuration  
Current Sense Discharge Transistor to  
Improve Dynamic Response  
1
2
3
4
8
7
6
5
VDD  
COMP  
OUTA  
OUTB  
GND  
FB  
CS  
RC  
130-µA Typical Starting Current  
1-mA Typical Run Current  
Operation to 1 MHz  
Internal Soft Start  
PW PACKAGE  
(TOP VIEW)  
On-Chip Error Amplifier With 2-MHz Gain  
Bandwidth Product  
1
8
7
6
5
OUTA  
VDD  
COMP  
FB  
OUTB  
GND  
RC  
D
On Chip VDD Clamping  
2
3
4
D
Output Drive Stages Capable of 500-mA  
Peak-Source Current, 1-A Peak-Sink Current  
CS  
description  
The UCC3808A is a family of BiCMOS push-pull, high-speed, low-power, pulse-width modulators. The UCC3808A  
contains all of the control and drive circuitry required for off-line or dc-to-dc fixed frequency current-mode switching  
power supplies with minimal external parts count.  
The UCC3808A dual output drive stages are arranged in a push-pull configuration. Both outputs switch at half the  
oscillator frequency using a toggle flip-flop. The dead time between the two outputs is typically 60 ns to 200 ns  
depending on the values of the timing capacitor and resistors, thus limiting each output stage duty cycle to less than  
50%.  
block diagram  
FB  
2
COMP  
1
CS  
3
8
7
VDD  
OVERCURRENT  
COMPARATOR  
22 k  
PEAK CURRENT  
COMPARATOR  
14 V  
0.75 V  
2.0 V  
0.5 V  
2.2 V  
S
OUTA  
VDD OK  
OSCILLATOR  
Q
Q
PWM  
LATCH  
R
S
R
1.2R  
Q
Q
S
Q
R
VDD−1 V  
T
PWM  
COMPARATOR  
VDD  
0.5 V  
R
SOFT START  
6
5
OUTB  
GND  
VOLTAGE  
REFERENCE  
SLOPE = 1 V/ms  
4
Note: Pinout shown is for SOIC and PDIP packages. TSSOP pinout is different.  
RC  
UDG-00097  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
ꢑꢣ  
Copyright 2002, Texas Instruments Incorporated  
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1
www.ti.com  

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