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UCC27528-Q1

更新时间: 2024-02-21 08:40:44
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德州仪器 - TI
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描述
Dual 5-A High-Speed Low-Side Gate Driver Based on CMOS Input Threshold Logic

UCC27528-Q1 数据手册

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UCC27528-Q1  
SNVSA89A DECEMBER 2014REVISED MAY 2015  
UCC27528-Q1 Dual 5-A High-Speed Low-Side Gate Driver Based on  
CMOS Input Threshold Logic  
1 Features  
2 Applications  
1
Qualified for Automotive Applications  
AEC-Q100 Device Temperature Grade 1  
Industry-Standard Pin Out  
Automotive  
Switch-Mode Power Supplies  
DC-to-DC Converters  
Motor Control, Solar Power  
Two Independent Gate-Drive Channels  
5-A Peak Source and Sink Drive Current  
Gate Drive for Emerging Wideband Gap Power  
Devices Such as GaN  
CMOS Input Logic Threshold  
(Function of Supply Voltage on VDD Pins)  
3 Description  
Hysteretic Logic Thresholds for High Noise  
Immunity  
The UCC27528-Q1 device is a dual-channel, high-  
speed, low-side gate driver capable of effectively  
driving MOSFET and IGBT power switches. Using a  
design that inherently minimizes shoot-through  
current, the UCC27528-Q1 device can deliver high-  
peak current pulses of up to 5-A source and 5-A sink  
into capacitive loads along with rail-to-rail drive  
capability and extremely small propagation delay of  
17 ns (typical). In addition, the drivers feature  
matched internal propagation delays between the two  
channels which are very well suited for applications  
requiring dual-gate drives with critical timing, such as  
synchronous rectifiers. The input pin thresholds are  
based on CMOS logic, which is a function of the VDD  
supply voltage. Wide hysteresis between the high and  
low thresholds offers excellent noise immunity. The  
enable pins are based on TTL and CMOS compatible  
logic, independent of the VDD supply voltage.  
Independent Enable Function for Each Output  
Inputs and Enable Pin Voltage Levels Not  
Restricted by VDD Pin Bias Supply Voltage  
4.5-V to 18-V Single Supply Range  
Outputs Held Low During VDD UVLO (Ensures  
Glitch-Free Operation at Power Up and Power  
Down)  
Fast Propagation Delays (17-ns Typical)  
Fast Rise and Fall Times (7-ns and 6-ns Typical)  
1-ns Typical Delay Matching Between 2 Channels  
Outputs Held in Low When Inputs Floating  
SOIC-8 Package  
Operating Temperature Range of –40°C to 140°C  
–5-V Negative Voltage Handling Capability on  
Input Pins  
Device Information(1)  
PART NUMBER  
PACKAGE  
BODY SIZE (NOM)  
UCC27528-Q1  
SOIC (8)  
4.90 mm × 3.91 mm  
(1) For all available packages, see the orderable addendum at  
the end of the datasheet.  
Dual Non-Inverting Inputs  
UCC27528-Q1  
ENA  
1
8
7
6
5
ENB  
OUTA  
VDD  
INA  
GND  
INB  
2
3
4
OUTB  
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,  
intellectual property matters and other important disclaimers. PRODUCTION DATA.  
 
 
 
 

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