UCC2750
UCC3750
CONNECTION DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Input Supply Voltage
VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7.5V
Maximum Forced Voltage
DIL-28, SOIC- 28 (Top View)
N Package, DW Package
VCP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to 13.2V
VS1, VS2. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3V to 5V
OUT1, OUT2, AMPOUT, OUTDC
Maximum Forced Voltage . . . . . . . . . . . . . . . . –0.3V to 7.5V
Maximum Forced Current . . . . . . . . . . . . . . Internally Limited
NEG1, NEG2, AMPIN, NEGDC
Maximum Forced Voltage . . . . . . . . . . . . . . . . –0.3V to 7.5V
SINREF, SINFLT
Maximum Forced Voltage . . . . . . . . . . . . . . . . –0.3V to 7.5V
Logic Inputs
Maximum Forced Voltage . . . . . . . . . . . . . . . . –0.3V to 7.5V
Reference Output Current (REF) . . . . . . . . . . Internally Limited
Output Current (GD1, GD2, GD3)
Pulsed. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.5A
Storage Temperature . . . . . . . . . . . . . . . . . . . –65°C to +150°C
Junction Temperature. . . . . . . . . . . . . . . . . . . –55°C to +150°C
Lead Temperature (Soldering, 10 Sec.). . . . . . . . . . . . . +300°C
RGOOD
GD1
1
2
3
4
5
6
7
8
9
28 GD2
27 ENBL
26 GD3
25 REF
24 RT
GND
VCP
VS 1
VS 2
23 CT
VDD
22 XTAL1
21 XTAL2
20 FS0
SWRLY
SINREF
SINFLT 10
OUTDC 11
NEGDC 12
AMP OUT 13
AMP IN 14
19 FS1
18 NEG2
17 NEG1
16 OUT1
15 OUT2
Unless otherwise indicated, voltages are reference to ground
and currents are positive into, negative out of the specified ter-
minal. Pulsed is defined as a less than 10% duty cycle with a
maximum duration of 500ns. Consult Packaging Section of
Databook for thermal limitations and considerations of pack-
ages.
ELECTRICAL CHARACTERISTICS:Unless otherwise stated, these specifications apply for TA = 0°C to 70°C for the
UCC3750, –40°C to +85°C for the UCC2750, RT = 14k, CT = 470pF, CREF = 0.1µF, FS0 = 0, FS1 = 0, VDD = 5V. TA = TJ.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX UNITS
VDD Supply
Supply Current - Active
With 12V Supplied to VCP and Charge Pump
Disabled
0.5
1
mA
Internal Reference w/External Bypass
Output Voltage (REF)
Load Regulation
7.3
2.9
7.55
30
3
7.8
60
15
V
IREF = 0mA – 2mA
mV
mV
Line Regulation
VCP = 10V to 13V, IREF = 1mA
Amplifier
Input Voltage
Error, DC Offset and Amp Amplifiers
DC Limit Amplifier
3
3.1
V
V
0.7125 0.75 0.7875
Input Bias Current
AVOL
15
70
6
100
nA
dB
V
VOUT = 2V to 4V
VOH
Source 100µA
5.35
0.5
–1
7.0
0.65
3
VOL
Sink 100µA
0.2
2
V
Short Circuit Current
Sine Reference
Accuracy
VIN = 0V and 5V with VOUT = 0V and 5V
mA
TJ = 25°C, Program Frequency–Reference
Frequency
0
1
Hz
Total Harmonic Distortion
Amplitude
(Note 1)
Peak
2
%
V
0.475
2.85
0.5
3.0
0.525
3.15
Offset
V
2