UCC25710
SLUSAD7A –APRIL 2011–REVISED MAY 2011
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DESCRIPTION (CONT.)
The LED current loop reference is set by a divider off the VREF 5-V output. The reference can be varied over a
0.5 V to 2.6 V range, allowing analog dimming to be combined with PWM dimming.
PWM dimming is used to control an external LED series switch and also to gate on and off the LLC power stage.
The LEDSW output along with a simple drive circuit is used to switch on and off the LED string current. This
output responds directly to the input signal at the dimming input, DIM. The LLC is also ramped on and off with
the dimming PWM input. The on and off LLC dimming edges are ramped at programmable slew rates to control
audible noise. The dimming function includes duty-cycle compensation to allow optimization of overall efficiency
and dimming linearity over a maximum range.
The control voltage to the VCO is set by ICOMP (current amplifier output) during LED on-times. During start-up
the soft-start pin, SS, will control the VCO response until it exceeds ICOMP. During dimming the rise and fall
rates of the VCO input are controlled by the voltage at the dimming slew rate, DSR, pin while the pedestal of
VCO control level will continue to be controlled by ICOMP. The current amplifier output is connected to ICOMP
only during the commanded dimming LED on-time. The LLC on-time is extended beyond the LED current
on-time at low dimming duty-cycles to maintain closed loop control of the LED current.
Protection thresholds for LED string over-voltage and under-voltage conditions are set with external resistive
dividers and accurate internal thresholds. Input current to the converter is monitored with both a re-start and
latch-off response depending on the over-current level. The controller also includes thermal shutdown protection.
The auto re-start response to any fault includes a 10-ms reset period followed by a soft-start. In the case of a
severe input over-current, restart will be disabled until the input supply is cycled through its UVLO threshold.
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled with
appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may be more
susceptible to damage because very small parametric changes could cause the device not to meet its published specifications.
ORDERING INFORMATION
PART NUMBER
PACKAGED DEVICES(1)
OPERATING TEMPERATURE RANGE, TA
UCC25710DW
SOIC 20-Pin (DW)
−40°C to 125°C
(1) DW (SOIC-20) package is available taped and reeled. Add R suffix to device type (e.g. UCC25710R) to order quantities of 2,500
devices per reel.
ABSOLUTE MAXIMUM RATINGS(1)
over operating free-air temperature range (unless otherwise noted)
MIN
MAX
20
UNIT
Supply voltage
VCC
V
LEDSW Output Current
VREF Output Current
ILEDSW
IVREF
IGD1, IDG2
VGD1, VGD2
+/- 2
-20
mA
V
Gate drive RMS current continuous GD1, GD2
Gate drive voltage, GD1 GD2
Voltage range
25
-0.5
VCC + 0.5
CS, CL, OV, UV, BLON,
DIM, CREF
−0.5
7
Operating junction temperature range, TJ
Storage temperature, TSTG
−55
−65
150
150
°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds
ESD - Human Body Model
260
HBM
CDM
2000
500
V
ESD - Charged Device Model
(1) Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings
only and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating
conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages
are with respect to GND. Currents are positive into, negative out of the specified terminal. These ratings apply over the operating
ambient temperature ranges unless otherwise noted.
2
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