Datasheet > UCC2580D-4

UCC2580D-4

更新时间： 2024-02-24 22:36:14

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
16页	567K
描述
Single Ended Active Clamp/Reset PWM

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技术参数
数据手册

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UCC2580D-4 技术参数

是否Rohs认证：	不符合	生命周期：	Transferred
包装说明：	SOP, SOP16,.25	Reach Compliance Code：	unknown
模拟集成电路 - 其他类型：	SWITCHING CONTROLLER	控制模式：	VOLTAGE-MODE
控制技术：	PULSE WIDTH MODULATION	最大输入电压：	14 V
最小输入电压：	10 V	标称输入电压：	12 V
JESD-30 代码：	R-PDSO-G16	JESD-609代码：	e0
功能数量：	1	端子数量：	16
最高工作温度：	85 °C	最低工作温度：	-40 °C
最大输出电流：	1.2 A	标称输出电压：	2.5 V
封装主体材料：	PLASTIC/EPOXY	封装代码：	SOP
封装等效代码：	SOP16,.25	封装形状：	RECTANGULAR
封装形式：	SMALL OUTLINE	认证状态：	Not Qualified
子类别：	Switching Regulator or Controllers	最大供电电流 (Isup)：	3.5 mA
表面贴装：	YES	切换器配置：	PUSH-PULL
最大切换频率：	430 kHz	技术：	BICMOS
温度等级：	INDUSTRIAL	端子面层：	Tin/Lead (Sn/Pb)
端子形式：	GULL WING	端子节距：	1.27 mm
端子位置：	DUAL	Base Number Matches：	1

UCC2580D-4 数据手册

UCC1580-1,-2,-3,-4

UCC2580-1,-2,-3,-4

UCC3580-1,-2,-3,-4

Single Ended Active Clamp/Reset PWM

FEATURES

DESCRIPTION

Provides Auxiliary Switch Activation

Complementary to Main Power

Switch Drive

The UCC3580 family of PWM controllers is designed to implement a variety

of active clamp/reset and synchronous rectifier switching converter topolo-

gies. While containing all the necessary functions for fixed frequency, high

performance pulse width modulation, the additional feature of this design is

the inclusion of an auxiliary switch driver which complements the main

power switch, and with a programmable deadtime or delay between each

transition. The active clamp/reset technique allows operation of single

ended converters beyond 50% duty cycle while reducing voltage stresses

on the switches, and allows a greater flux swing for the power transformer.

This approach also allows a reduction in switching losses by recovering en-

ergy stored in parasitic elements such as leakage inductance and switch

capacitance.

Programmable deadtime (Turn-on

Delay) Between Activation of Each

Switch

Voltage Mode Control with

Feedforward Operation

Programmable Limits for Both

Transformer Volt- Second Product

and PWM Duty Cycle

The oscillator is programmed with two resistors and a capacitor to set

switching frequency and maximum duty cycle. A separate synchronized

ramp provides a voltage feedforward pulse width modulation and a pro-

grammed maximum volt-second limit. The generated clock from the oscilla-

tor contains both frequency and maximum duty cycle information.

High Current Gate Driver for Both

Main and Auxiliary Outputs

Multiple Protection Features with

Latched Shutdown and Soft Restart

Low Supply Current (100 mA Startup,

1.5 mA Operation)

(continued)

BLOCK DIAGRAM

UDG-95069-2

Pin Numbers refer to DIL-16 and SOIC-16 packages

SLUS292C - FEBRUARY 1999 - REVISED MAY 2005

12 3 4 5 6 7...16

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