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UC3842ACS PDF预览

UC3842ACS

更新时间: 2024-11-03 23:38:59
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其他 - ETC 模拟IC
页数 文件大小 规格书
6页 263K
描述
Analog IC

UC3842ACS 数据手册

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UC3842A High Performance  
Current Mode Controller  
The UC3842A series of high performance  
Also included are protective features  
consisting of input and reference undervoltage lockouts  
each with hysteresis, cycle–by–cycle current limiting,  
programmable output deadtime, and a latch for single  
pulse metering.  
This device is available in an 8–pin dual–in–  
line plastic package as well as the 14–pin plastic surface  
mount (SO–14). The SO–14 package has separate  
power and ground pins for the totem pole output  
stage.  
fixed frequency current mode controllers are  
specifically designed for off–line and dc–to–dc  
converter applications offering the designer a cost  
effective solution with minimal external components.  
This integrated circuit features a trimmed oscillator  
for precise duty cycle control, a temperature  
compensated reference, high gain error amplifier,  
current sensing comparator, and a high current totem  
pole output ideally suited for driving a power  
MOSFET.  
The UC3842A has UVLO thresholds of  
16V(on) and 10V(off), ideally suited for off–line  
converters.  
l
Trimmed Oscillator Discharge Current for Precise Duty  
Cycle Control  
CDSUFFIX  
PLASTIC PACKAGE  
8 DIP  
l
l
l
l
l
l
l
Current Mode Operation to 500 kHz  
Automatic Feed Forward Compensation  
Latching PWM for Cycle–By–Cycle Current Limiting  
Internally Trimmed Reference with Undervoltage Lockout  
High Current Totem Pole Output  
D8SUFFIX  
PLASTIC PACKAGE  
8 SOP  
Undervoltage Lockout with Hysteresis  
Low Startup and Operating Current  
CSSUFFIX  
PLASTIC PACKAGE  
SOP-14  
SIMPLIFIEDBLOCKDIAGRAM  
PINCONNECTIONS  
Pin numbers adjacent to terminals are for the D suffix 8-DIP package.  
Pin numbers in parenthesis are for the S suffix SOP–14 package.  
NOTES: 1. Maximum Package power dissipation limits must be observed.  
2. Adjust VCC above the Startup threshold before setting to 15 V.  
3. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible  
Tlow = 0°C, Thigh = +70°C.  
4. This parameter is measured at the latch trip point with VFB = 0V.  
V Output Compensation  
V Current Sense Input  
5. Comparator gain is defined as: AV  
4-12  

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