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UC2875J PDF预览

UC2875J

更新时间: 2024-11-06 08:26:23
品牌 Logo 应用领域
德州仪器 - TI 稳压器开关式稳压器或控制器电源电路开关式控制器
页数 文件大小 规格书
19页 740K
描述
Phase Shift Resonant Controller

UC2875J 技术参数

是否Rohs认证:不符合生命周期:Obsolete
零件包装代码:DIP包装说明:CERAMIC, DIP-20
针数:20Reach Compliance Code:not_compliant
ECCN代码:EAR99HTS代码:8542.39.00.01
风险等级:5.14Is Samacsys:N
其他特性:CAN ALSO BE CONFIGURED IN CURRENT MODE模拟集成电路 - 其他类型:SWITCHING CONTROLLER
控制模式:VOLTAGE-MODE控制技术:RESONANT CONTROL
最大输入电压:20 V最小输入电压:11 V
标称输入电压:12 VJESD-30 代码:R-GDIP-T20
功能数量:1端子数量:20
最高工作温度:85 °C最低工作温度:-25 °C
最大输出电流:3 A封装主体材料:CERAMIC, GLASS-SEALED
封装代码:DIP封装等效代码:DIP20,.3
封装形状:RECTANGULAR封装形式:IN-LINE
峰值回流温度(摄氏度):NOT SPECIFIED认证状态:Not Qualified
座面最大高度:5.08 mm子类别:Switching Regulator or Controllers
表面贴装:NO切换器配置:PHASE-SHIFT
最大切换频率:1200 kHz技术:BIPOLAR
温度等级:OTHER端子形式:THROUGH-HOLE
端子节距:2.54 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:7.62 mm
Base Number Matches:1

UC2875J 数据手册

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application  
INFO  
UC1875/6/7/8  
UC2875/6/7/8  
UC3875/6/7/8  
available  
Phase Shift Resonant Controller  
FEATURES  
DESCRIPTION  
Zero to 100% Duty Cycle Control  
The UC1875 family of integrated circuits implements control of a bridge  
power stage by phase-shifting the switching of one half-bridge with respect  
to the other, allowing constant frequency pulse-width modulation in combi-  
nation with resonant, zero-voltage switching for high efficiency performance  
at high frequencies. This family of circuits may be configured to provide  
control in either voltage or current mode operation, with a separate  
over-current shutdown for fast fault protection.  
Programmable Output Turn-On Delay  
Compatible with Voltage or Current  
Mode Topologies  
Practical Operation at Switching  
Frequencies to 1MHz  
A programmable time delay is provided to insert a dead-time at the turn-on  
of each output stage. This delay, providing time to allow the resonant  
switching action, is independently controllable for each output pair (A-B,  
C-D).  
Four 2A Totem Pole Outputs  
10MHz Error Amplifier  
Undervoltage Lockout  
With the oscillator capable of operation at frequencies in excess of 2MHz,  
overall switching frequencies to 1MHz are practical. In addition to the stan-  
dard free running mode, with the CLOCKSYNC pin, the user may configure  
these devices to accept an external clock synchronization signal, or may  
lock together up to 5 units with the operational frequency determined by  
the fastest device.  
Low Startup Current –150µA  
Outputs Active Low During UVLO  
Soft-Start Control  
Latched Over-Current Comparator  
With Full Cycle Restart  
Protective features include an undervoltage lockout which maintains all out-  
puts in an active-low state until the supply reaches a 10.75V threshold.  
1.5V hysteresis is built in for reliable, boot-strapped chip supply.  
Over-current protection is provided, and will latch the outputs in the OFF  
state within 70nsec of a fault. The current-fault circuitry implements  
Trimmed Reference  
full-cycle restart operation.  
(continued)  
BLOCK DIAGRAM  
UDG-95073  
SLUS229B - JULY 1999 - REVISED JUNE 2004  

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