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U441NL PDF预览

U441NL

更新时间: 2024-11-21 15:55:47
品牌 Logo 应用领域
威世 - VISHAY /
页数 文件大小 规格书
6页 74K
描述
Small Signal Field-Effect Transistor, N-Channel, Junction FET

U441NL 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:,Reach Compliance Code:unknown
风险等级:5.89FET 技术:JUNCTION
JESD-609代码:e0最高工作温度:150 °C
极性/信道类型:N-CHANNEL最大功率耗散 (Abs):0.5 W
子类别:FET General Purpose Small Signal表面贴装:NO
端子面层:Tin/Lead (Sn/Pb)Base Number Matches:1

U441NL 数据手册

 浏览型号U441NL的Datasheet PDF文件第2页浏览型号U441NL的Datasheet PDF文件第3页浏览型号U441NL的Datasheet PDF文件第4页浏览型号U441NL的Datasheet PDF文件第5页浏览型号U441NL的Datasheet PDF文件第6页 
SST441NL/U441NL  
New Product  
Vishay Siliconix  
Monolithic N-Channel JFET Duals  
PRODUCT SUMMARY  
VGS(off) (V) V(BR)GSS Min (V) gfs Min (mS) IG Typ (pA) |VGS1 - VGS2|Max (mV)  
-1 to -6  
-25  
4.5  
-1  
20  
FEATURES  
BENEFITS  
APPLICATIONS  
D Anti Latchup Capability  
D Monolithic Design  
D High Slew Rate  
D External Substrate Bias—Avoids Latchup  
D Wideband Differential Amps  
D Tight Differential Match vs. Current  
D High-Speed,  
Temp-Compensated,  
Single-Ended Input Amps  
D Improved Op Amp Speed, Settling Time  
Accuracy  
D Low Offset/Drift Voltage  
D Low Gate Leakage: 1 pA  
D Low Noise  
D High Speed Comparators  
D High-Speed Performance  
D Impedance Converters  
D Minimum Input Error/Trimming Requirement  
D Insignificant Signal Loss/Error Voltage  
D High System Sensitivity  
D High CMRR: 90 dB  
D Minimum Error with Large Input Signal  
DESCRIPTION  
The SST441NL is a monolithic high-speed dual JFET  
mounted in a single SO-8 package. This JFET is an excellent  
choice for use as wideband differential amplifiers in  
demanding test and measurement applications.  
The U441NL in the hermetically sealed TO-78 package is  
available with full military processing.  
The SO-8 package provides ease of manufacturing. The  
symmetrical pinout prevents improper orientation. The SO-8  
package is available with tape-and-reel options for  
compatibility with automatic assembly methods.  
Pins 4 and 8 on the SST441NL and pin 4 on the U441NL part  
numbers enable the substrate to be connected to a positive,  
external bias (VDD) to avoid latchup.  
TO-78  
Narrow Body SOIC  
S
G
2
1
1
3
7
5
S
D
G
SUBSTRATE  
1
2
3
4
8
7
6
5
1
1
1
G
2
D
1
D
2
2
6
D
2
SUBSTRATE  
S
2
G
1
S
2
4
CASE, SUBSTRATE  
Top View  
Marking Codes:  
SST441NL - 441NL  
Top View  
U441NL  
ABSOLUTE MAXIMUM RATINGS  
a
Gate-Drain, Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -25 V  
Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA  
Power Dissipation :  
Notes  
Per Side . . . . . . . . . . . . . . . . . . . . . . . . 300 mW  
b
Total . . . . . . . . . . . . . . . . . . . . . . . . . . . 500 mW  
1
Lead Temperature ( / ” from case for 10 sec.) . . . . . . . . . . . . . . . . . . . 300_C  
16  
a. Derate 2.4 mW/_C above 25_C  
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55 to 150_C  
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . -55 to 150_C  
b. Derate 4 mW/_C above 25_C  
For applications information see AN102.  
Document Number: 72056  
S-22526–Rev. A, 17-Feb-03  
www.vishay.com  
7-1  

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