TXS0302
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SCES835 –NOVEMBER 2011
2-BIT BIDIRECTIONAL VOLTAGE-LEVEL TRANSLATOR WITH AUTOMATIC DIRECTION
SENSING
Check for Samples: TXS0302
1
FEATURES
•
ESD Protection Exceeds JESD 22
–
–
2000-V Human-Body Model (A114)
500-V Machine Model (C101)
•
Fully Symmetric Supply Voltages. 0.9-V to
3.6-V on A Port and B Port
•
•
•
Max Open Drain Data Rate: 8Mbps
DQE OR DQM PACKAGE
(TOP VIEW)
Internal Pull-up Resistors: 4.7-kΩ
VCC Isolation Feature – If Either VCC Input Is at
GND, All Outputs Are in the High-Impedance
State
8
VCCA
A1
1
2
3
4
VCCB
B1
7
6
5
•
•
•
OE Input Circuit Referenced to VCCA
A2
B2
Low Power Consumption, 4-µA Max ICCA + ICCB
GND
OE
Ioff Supports Partial-Power-Down Mode
Operation
•
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
DESCRIPTION/ORDERING INFORMATION
This 2-bit non-inverting translator uses two separate configurable power-supply rails. The A port is designed to
track VCCA. VCCA accepts any supply voltage from 0.9 V to 3.6 V. The B port is designed to track VCCB. VCCB
accepts any supply voltage from 0.9 V to 3.6 V. This allows for low-voltage bidirectional translation between 1-V,
1.2-V, 1.5-V, 1.8-V, 2.5-V and 3.3-V voltage nodes. For the TXS0302, when the output-enable (OE) input is low,
all outputs are placed in the high-impedance state. To ensure the high-impedance state during power up or
power down, OE should be tied to GND through a pull-down resistor; the minimum value of the resistor is
determined by the current-sourcing capability of the driver. The TXS0302 is designed so that the OE input circuit
is supplied by VCCA. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the device when it is powered down. For
typical application circuitry, refer to Figure 1.
Functional Table
Inputs
Output
Bn/An
L
OE
H
VCCA/VCCB
An/Bn
H
H
L
L
H
X
X
H
H
H
3-State
3-State
L
X
1
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Copyright © 2011, Texas Instruments Incorporated