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TSC21020F-20MA-E PDF预览

TSC21020F-20MA-E

更新时间: 2024-11-23 06:01:51
品牌 Logo 应用领域
爱特美尔 - ATMEL /
页数 文件大小 规格书
50页 696K
描述
Rad. Hard 32/40-bit IEEE Floating Point DSP

TSC21020F-20MA-E 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:PGA
包装说明:PGA, PGA223,18X18针数:223
Reach Compliance Code:compliant风险等级:5.62
位大小:32边界扫描:YES
最大时钟频率:20 MHz外部数据总线宽度:40
格式:FLOATING POINTJESD-30 代码:S-CPGA-P223
JESD-609代码:e0长度:47.245 mm
低功率模式:NO端子数量:223
最高工作温度:125 °C最低工作温度:-55 °C
输出数据总线宽度:40封装主体材料:CERAMIC, METAL-SEALED COFIRED
封装代码:PGA封装等效代码:PGA223,18X18
封装形状:SQUARE封装形式:GRID ARRAY
峰值回流温度(摄氏度):NOT SPECIFIED电源:5 V
认证状态:Not QualifiedRAM(字数):0
座面最大高度:4.7 mm子类别:Digital Signal Processors
最大压摆率:430 mA最大供电电压:5.5 V
最小供电电压:4.5 V标称供电电压:5 V
表面贴装:NO技术:CMOS
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:PIN/PEG端子节距:2.54 mm
端子位置:PERPENDICULAR处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:47.245 mmuPs/uCs/外围集成电路类型:DSP PERIPHERAL, FLOATING POINT PROCESSOR
Base Number Matches:1

TSC21020F-20MA-E 数据手册

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Features  
Superscalar IEEE Floating-Point-Processor  
Off-Chip Harvard Architecture Maximizes Signal Processing Performance  
50 ns, 20 MIPS Instruction Rate, Single Cycle Execution  
60 MFLOPS Peak, 40 MFLOPS Sustained Performance  
1024-Point Complex FFT Benchmark: 0.975 ms  
Divide (y/x): 300 ns  
Inverse Square Root (1/ /x): 450 ns  
32-bit Single-Precision and 40-bit Extended-Precision IEEE Floating-Point Data  
Formats  
32-bit Fixed-Point Formats, Integer and Fractional, with 80-bit Accumulators  
IEEE Exception Handling with Interrupt on Exception  
Three Independent Computation Units: Multiplier, ALU, and Barrel Shifter  
Dual Data Address Generators with Indirect, Immediate, Modulo, and Bit Reverse  
Addressing Modes  
Rad. Hard  
32/40-bit IEEE  
Floating Point  
DSP  
Two Off-Chip Memory Transfers in Parallel with Instruction Fetch and Single-Cycle  
Multiply and ALU Operations  
Multiply with Add and Subtract for FFT Butterfly Computation  
Efficient Program Sequencing with Zero Overhead Looping: Single-Cycle Loop Setup  
Single-Cycle Register File Context Switch  
23ns External RAM Access Time for Zero-Wait-State, 40 ns Instruction Execution  
IEEE JTAG Standard 1149.1 Test Access Port and On-chip Emulation Circuitry  
223 CPGA package for breadboarding  
TSC21020F  
256 Multi-layer Quad Flat Pack, Flat Leads, For Flight Models  
Fully compatible with Analog Devices ADSP-21020  
No Single Event Latch-up below a LET Threshold of 80 MeV/mg/cm2  
Tested up to a Total Dose of 100 krads (Si) according to MIL STD 883 Method 1019  
SEU Error Note in GEO Orbit Better than 5E-7 Error/Device/Day (worst case)  
For 25 MHz Specification, Contact Atmel for Availability  
Quality Grades - ESCC with 9512/002 and QML-Q or V with 5962-99539  
Introduction  
Atmel is manufacturing a radiation hard version of the Analog Devices ADSP-21020  
32/40-bit Floating-Point DSP.  
The product is pin and code compatible with ADI product, making system develop-  
ment straight forward and cost effective, using existing development tools and  
algorithms.  
Notes: 1. Design using patent from INPG-CNRS Denis BESSOT/Raoul VELAZCO  
2. Product licensed from Analog Devices Inc.  
Rev. 4153I-AERO–04/07  
1

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