Datasheet > 微控制器和处理器 > 微控制器> TS87C52X2-LIA

TS87C52X2-LIA

更新时间： 2024-11-08 07:04:59

品牌	Logo	应用领域
爱特美尔 - ATMEL		微控制器
页数	文件大小	规格书
55页	596K
描述
8-bit Microcontroller 8 Kbytes ROM/OTP, ROMless

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中文翻译

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数据手册

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TS87C52X2-LIA 数据手册

Features

80C52 Compatible

•

– 8051 Pin and Instruction Compatible

– Four 8-bit I/O Ports

– Three 16-bit Timer/Counters

– 256 Bytes Scratchpad RAM

High-speed Architecture

•

40 MHz at 5V, 30 MHz at 3V

X2 Speed Improvement Capability (6 Clocks/Machine Cycle)

– 30 MHz at 5V, 20 MHz at 3V (Equivalent to 60 MHz at 5V, 40 MHz at 3V)

Dual Data Pointer

•

8-bit

On-chip ROM/EPROM (8Kbytes)

Programmable Clock Out and Up/Down Timer/Counter 2

Asynchronous Port Reset

Microcontroller

8 Kbytes

ROM/OTP,

ROMless

Interrupt Structure with

– 6 Interrupt Sources

– 4 Level Priority Interrupt System

Full Duplex Enhanced UART

– Framing Error Detection

•

– Automatic Address Recognition

Low EMI (Inhibit ALE)

Power Control Modes

•

– Idle Mode

– Power-down Mode

– Power-off Flag

TS80C32X2

TS87C52X2

TS80C52X2

AT80C32X2

AT80C52X2

AT87C52X2

•

Once Mode (On-chip Emulation)

Power Supply: 4.5 - 5.5V, 2.7 - 5.5V

Temperature Ranges: Commercial (0 to 70^oC) and Industrial (-40 to 85^oC)

Packages: PDIL40, PLCC44, VQFP44 1.4, PQFP44 (13.9 footprint)

Description

TS80C52X2 is high performance CMOS ROM, OTP, EPROM and ROMless versions

of the 80C51 CMOS single chip 8-bit microcontroller.

The TS80C52X2 retains all features of the 80C51 with extended ROM/EPROM

capacity (8 Kbytes), 256 bytes of internal RAM, a 6-source, 4-level interrupt system,

an on-chip oscilator and three timer/counters.

In addition, the TS80C52X2 has a dual data pointer, a more versatile serial channel

that facilitates multiprocessor communication (EUART) and an X2 speed improve-

ment mechanism.

The fully static design of the TS80C52X2 allows to reduce system power consumption

by bringing the clock frequency down to any value, even DC, without loss of data.

The TS80C52X2 has 2 software-selectable modes of reduced activity for further

reduction in power consumption. In the idle mode the CPU is frozen while the timers,

the serial port and the interrupt system are still operating. In the power-down mode the

RAM is saved and all other functions are inoperative.

Rev. 4184I–8051–02/08

12 3 4 5 6 7...55

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