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TS83102G0CGL PDF预览

TS83102G0CGL

更新时间: 2024-11-19 23:37:47
品牌 Logo 应用领域
其他 - ETC 转换器异步传输模式ATM
页数 文件大小 规格书
1页 26K
描述
Analog to Digital Converter

TS83102G0CGL 数据手册

  
Released under NDA  
TS83102G0  
MAIN FEATURES  
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10-bit resolution.  
2 GSPS sampling rate.  
3 GHz full power input bandwidth.  
Band flatness: ± 0.2 dB (from DC up to 1.5 GHz).  
Very low input VSWR : 1.15 max from DC to 2GHz (packaged device).  
Phase error: 0.2° (from 750MHz to 1.5GHz)  
Power consumption : 4.6 W.  
SFDR= 59 dBc ; 7.6 Effective Bits @FS = 1.4 GSPS, FIN = 700 MHz [-1dBFS].  
SFDR = 52dBc ; 7.2 Effective Bits @Fs = 1.4 GSPS, FIN = 1950 MHz [-1dBFS].  
SFDR= 56 dBc ; 6.4 Effective Bits @FS = 2 GSPS, FIN = 950 MHz [-1dBFS].  
DNL = ±1.1 LSB, INL = ±2.3 LSB.  
ADC 10-bit 2 Gsps  
Converter  
Low Bit Error Rate (10-12) @ 2 GSPS and Tj = 110°C  
500 mVpp differential 100or single-ended 50Ω (±1 %) analog inputs.  
Differential 100or single-ended 50ECL compatible clock inputs.  
ECL or LVDS output compatibility.  
50differential outputs with common mode independent on temperature.  
Data ready output with asynchronous reset.  
Out-of-Range output bit.  
Gray or Binary selectable output data ; NRZ output mode.  
Pattern generator output (for acquisition system monitoring).  
ADC gain adjust.  
Sampling delay adjust.  
Offset control capability.  
Radiation tolerance oriented design (more than 100Krad (Si) expected).  
TS83102G0  
1/ CBGA148 down  
TS83102G0CGL  
APPLICATION  
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Direct RF down conversion.  
Wide band satellite receiver.  
High speed instrumentation.  
High speed acquisition systems.  
High energy physics.  
2/ Die form : JTS83102G0  
3/ Hermetic ceramic package :  
to be defined on request  
Automatic test equipment.  
SCREENING  
4/ DMUX 10 bit 1:4/1:8 2Gsps  
TS81102G0 :  
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Standard die flow  
Package Temperature range : To be defined  
Companion device available  
DESCRIPTION  
The TS83102G0 is a monolithic 10-bit analog-to-digital converter, designed for digitizing  
wide bandwidth analog signals at very high sampling rates of up to 2 Gsps.  
5/ CBGA package Evaluation  
Board TSEV83102G0GL  
The TS83102G0 is using an innovative architecture, including an on-chip Sample and  
Hold (S/H), and is fabricated with an advanced high speed bipolar SiGe heterojunction  
process, featuring 75GHz cutoff frequency.  
The 3 GHz full power input bandwidth and the band flatness performances enables the  
digitizing of high IF and large bandwidth signals.  
CBGA 148 Packaged device  
January 2002  

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