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TS68882MRB/C25 PDF预览

TS68882MRB/C25

更新时间： 2024-11-15 22:24:27
品牌 Logo 应用领域
爱特美尔 - ATMEL 微控制器和处理器外围集成电路算术处理器异步传输模式ATM时钟
页数 文件大小 规格书
43页 1389K
描述
CMOS Enhanced Floating-point Co-processor

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中文翻译

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TS68882MRB/C25 技术参数

是否Rohs认证： 不符合生命周期：Transferred
零件包装代码：PGA包装说明：PGA, PGA68,10X10
针数：68Reach Compliance Code：unknown
ECCN代码：3A001.A.2.CHTS代码：8542.31.00.01
风险等级：5Is Samacsys：N
地址总线宽度：5边界扫描：NO
最大时钟频率：25 MHz外部数据总线宽度：32
JESD-30 代码：S-CPGA-P68JESD-609代码：e0
长度：26.92 mm端子数量：68
最高工作温度：125 °C最低工作温度：-55 °C
封装主体材料：CERAMIC, METAL-SEALED COFIRED封装代码：PGA
封装等效代码：PGA68,10X10封装形状：SQUARE
封装形式：GRID ARRAY电源：5 V
认证状态：Not Qualified筛选级别：MIL-STD-883 Class B
座面最大高度：4.184 mm子类别：Math Processors
最大压摆率：136 mA最大供电电压：5.5 V
最小供电电压：4.5 V标称供电电压：5 V
表面贴装：NO技术：CMOS
温度等级：MILITARY端子面层：Tin/Lead (Sn/Pb)
端子形式：PIN/PEG端子节距：2.54 mm
端子位置：PERPENDICULAR宽度：26.92 mm
uPs/uCs/外围集成电路类型：MATH PROCESSOR, COPROCESSORBase Number Matches：1

TS68882MRB/C25 数据手册

 浏览型号TS68882MRB/C25的Datasheet PDF文件第2页浏览型号TS68882MRB/C25的Datasheet PDF文件第3页浏览型号TS68882MRB/C25的Datasheet PDF文件第4页浏览型号TS68882MRB/C25的Datasheet PDF文件第5页浏览型号TS68882MRB/C25的Datasheet PDF文件第6页浏览型号TS68882MRB/C25的Datasheet PDF文件第7页 
Features  
• Eight General-purpose Floating-point Data Registers, Each Supporting a Full 80-bit  
Extended Precision Real Data Format (a 64-bit Mantissa Plus a Sign Bit, and a 15-bit  
Signed Exponent)  
• A 67-bit Arithmetic Unit to Allow Very Fast Calculations with Intermediate are Precision  
Greater than the Extended Precision Format  
• A 67-bit Barrel Shifter for High-speed Shifting Operations (for Normalizing etc.)  
• Special-purpose Hardware for High-speed Conversion Between Single, Double, and  
Extended Formats and the Internal Extended Format  
• An Independent State Machine to Control Main Processor Communication for  
Pipelined Instruction Processing  
• Forty-six Instructions, Including 35 Arithmetic Operations  
• Full Conformation to the IEEE 754 Standard, Including All Requirements and  
Suggestions  
• Support of Functions Not Defined by the IEEE Standard, Including a Full Set of  
Trigonometric and Transcendental Functions  
• Seven Data Type Types: Byte, Word and Long Integers; Single, Double, and Extended  
Precision Real Numbers; and Packed Binary Coded Decimal String Real Numbers  
• Twenty-two Constants Available In The On-chip ROM, Including π, e, and Powers of 10  
• Virtual Memory/Machine Operations  
CMOS  
Enhanced  
Floating-point  
Co-processor  
• Efficient Mechanisms for Procedure Calls, Context Switches, and Interrupt Handling  
• Fully Concurrent Instruction Execution with the Main Processor  
• Fully Concurrent Instruction Execution of Multiple Floating-point Instructions  
• Use with any Host Processor, on an 8-, 16- or 32-bit Data Bus  
• Available in 16.67, 20, 25 and 33 MHz for Tc from -55°C to +125°C  
• VCC = 5V 10%  
TS68882  
Description  
The TS68882 enhanced floating-point co-processor is a full implementation of the  
IEEE Standard for Binary Floating-Point Arithmetic (754) for use with the THOMSON  
TS68000 Family of microprocessors. It is a pin and software compatible upgrade of  
the TS68881 with optimized MPU interface that provides over 1.5 times the perfor-  
mance of the TS68881. It is implemented using VLSI technology to give systems  
designers the highest possible functionality in a physically small device.  
Intended primarily for use as a co-processor to the TS68020/68030 32-bit micropro-  
cessor units (MPUs), the TS68882 provides a logical extension to the main MPU  
integer data processing capabilities. It does this by providing a very high performance  
floating-point arithmetic unit and a set of floating-point data registers that are utilized  
in a manner that is analogous to the use of the integer data registers. The TS68882  
instruction set is a natural extension of all earlier members of the TS68000 Family, and  
supports all of the addressing modes of the host MPU. Due to the flexible bus inter-  
face of the TS68000 Family, the TS68882 can be used with any of the MPU devices of  
the TS68000 Family, and it may also be used as a peripheral to non-TS68000  
processors.  
Screening/Quality  
This product could be manufactured  
R suffix  
PGA 68  
Ceramic Pin Grid Array  
F suffix  
CQFP 68  
Ceramic Quad Flat Pack  
in full compliance with either:  
•
•
•
MIL-STD-883 Class B  
DESC 5962-89436  
or According to ATMEL-  
Grenoble Standards  
Rev. 2119A–HIREL–04/02  
1234567...43

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