TR F5 00 1
R EC E IV E R
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SLWS084 – DECEMBER 2000
GQE PACKAGE
(TOP VIEW)
D
Complete L1-Band Global Postioning
System (GPS) RF Receiver
1
2
3
4
5
6
7
8
9
D
2.7-V to 3.3-V Operation
D
Low Current Consumption, 49 mA Typical
at 2.7 V
A
B
D
D
D
D
Integrated Voltage-Controlled Oscillator
(VCO) Tank Circuit
C
D
Compatible With Cellular Phone
Environment While Transmitter Is Active
E
F
G
H
J
Programmable Sleep Mode for Extended
Standby Time
Integrated Low Noise Amplifier (LNA) and
Image Reject Mixer Front-End With Typical
Cascaded Noise Figure of 2.9 dB
D
D
Integrated Phase-Locked Loop (PLL)
4-Bit Analog-To-Digital Converter (ADC)
With Programmable Automatic Gain
Control (AGC) for Improved GPS Receiver
Sensitivity
D
D
Operating Temperature Range: –40°C to
85°C
D
D
D
D
Digital CMOS Compatible Inputs/Outputs
Code Division Multiple Access/ Time-
Division Multiple Access
(CDMA/TDMA/GSM) System Clock-
Compatible Synthesizer
User-Selected Internal/External Sampling
Clock for ADC
RF BiCMOS technology with ESD
Protection to 2000 V HBM (non-RF Pins)
D
D
Image-Reject Architecture for Reduced
Parts Count and Page Control Block (PCB)
Real Estate Requirements
Chip Scale Package (CSP) 5 mm x 5 mm
3-Wire Serial Interface and Single Blanking
Mode Control Terminal
description
The TRF5001 device is a dual down-conversion receiver that is compatible with cellular terminals while the
transmitter is active. The TRF5001 device includes an integrated low-noise amplifier and mixer, a
fixed-frequency synthesizer to generate both first and second local oscillator frequencies, and a four-bit ADC
for use in GPS applications requiring exceptional sensitivity, such as E-911. By using only the most significant
bit (MSB), the TRF5001 device can be mated to more conventional baseband processors requiring only single
bit resolution. The typical first intermediate frequency is 222.54 MHz with a final intermediate frequency into the
ADC of 2.94 MHz. An external or internal sampling clock can be selected for custom use of the TRF5001 device,
as long as the Nyquist sampling rate is satisfied.
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the gates.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TI is a trademark of Texas Instruments Incorporated.
Copyright 2000, Texas Instruments Incorporated
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