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TPS74301KTWRG3 PDF预览

TPS74301KTWRG3

更新时间: 2024-11-21 03:16:11
品牌 Logo 应用领域
德州仪器 - TI 线性稳压器IC调节器电源电路输出元件
页数 文件大小 规格书
27页 847K
描述
1.5A Ultra-LDO with Programmable Sequencing

TPS74301KTWRG3 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Obsolete零件包装代码:D2PAK
包装说明:, SMSIP7H,.55,50TB针数:7
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8542.39.00.01风险等级:5.38
可调性:ADJUSTABLE最大回动电压 1:0.12 V
标称回动电压 1:0.06 VJESD-30 代码:R-PSSO-G7
JESD-609代码:e3长度:10.095 mm
湿度敏感等级:3功能数量:1
输出次数:1端子数量:7
工作温度TJ-Max:125 °C工作温度TJ-Min:-40 °C
最大输出电流 1:1.5 A最大输出电压 1:3.6 V
最小输出电压 1:0.8 V封装主体材料:PLASTIC/EPOXY
封装等效代码:SMSIP7H,.55,50TB封装形状:RECTANGULAR
封装形式:SMALL OUTLINE包装方法:TAPE AND REEL
峰值回流温度(摄氏度):245认证状态:Not Qualified
调节器类型:ADJUSTABLE POSITIVE SINGLE OUTPUT LDO REGULATOR座面最大高度:4.955 mm
子类别:Other Regulators表面贴装:YES
技术:CMOS端子面层:Matte Tin (Sn)
端子形式:GULL WING端子节距:1.27 mm
端子位置:SINGLE处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:8.89 mmBase Number Matches:1

TPS74301KTWRG3 数据手册

 浏览型号TPS74301KTWRG3的Datasheet PDF文件第2页浏览型号TPS74301KTWRG3的Datasheet PDF文件第3页浏览型号TPS74301KTWRG3的Datasheet PDF文件第4页浏览型号TPS74301KTWRG3的Datasheet PDF文件第5页浏览型号TPS74301KTWRG3的Datasheet PDF文件第6页浏览型号TPS74301KTWRG3的Datasheet PDF文件第7页 
TPS74301  
www.ti.com  
SBVS065EDECEMBER 2005REVISED MAY 2007  
1.5A Ultra-LDO with Programmable Sequencing  
FEATURES  
DESCRIPTION  
Track Pin Allows for Flexible Power-Up  
Sequencing  
The TPS74301 low-dropout (LDO) linear regulator  
provides an easy-to-use robust power management  
solution for a wide variety of applications. The  
TRACK pin allows the output to track an external  
supply. This feature is useful in minimizing the stress  
on ESD structures that are present between the  
CORE and I/O power pins of many processors. The  
enable input and power-good output allow easy  
sequencing with external regulators. This complete  
flexibility allows the user to configure a solution that  
meets the sequencing requirements of FPGAs,  
DSPs, and other applications with special start-up  
requirements.  
1% Accuracy Over Line, Load, and  
Temperature  
Supports Input Voltages as Low as 0.9V with  
External Bias Supply  
Adjustable Output (0.8V to 3.6V)  
Ultra-Low Dropout: 55mV at 1.5A (typ)  
Stable with Any or No Output Capacitor  
Excellent Transient Response  
Available in 5mm × 5mm × 1mm QFN and  
DDPAK-7 Packages  
A precision reference and error amplifier deliver 1%  
accuracy over load, line, temperature, and process.  
Each LDO is stable with low-cost ceramic output  
capacitors and the device is fully specified from  
–40°C to +125°C. The TPS74301 is offered in a  
small (5mm × 5mm) QFN package, yielding a highly  
compact total solution size. For applications that  
require additional power dissipation, the DDPAK  
(KTW) package is also available.  
Open-Drain Power-Good (5 × 5 QFN)  
Active High Enable  
APPLICATIONS  
FPGA Applications  
DSP Core and I/O Voltages  
Post-Regulation Applications  
Applications with Special Start-Up Time or  
Sequencing Requirements  
IOUT = 500mA  
VIN  
CIN  
VPG  
IN  
PG  
OUT  
FB  
VTRACK  
TPS74301  
R5  
R1  
R2  
VPG  
EN  
VBIAS  
VOUT  
CBIAS  
BIAS  
COUT  
VTRACK  
TRACK  
R3  
R4  
GND  
VOUT  
Optional  
Figure 1. Typical Application Circuit  
Time (20ms/div)  
Figure 2. Tracking Response  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
All trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2005–2007, Texas Instruments Incorporated  

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