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TPS51206DSQT PDF预览

TPS51206DSQT

更新时间: 2023-06-19 15:36:42
品牌 Logo 应用领域
德州仪器 - TI 驱动双倍数据速率光电二极管接口集成电路总线通信稳压器驱动程序和接口
页数 文件大小 规格书
23页 609K
描述
具有用于 DDR2/3/3L/4 的 VTTREF 缓冲基准的 2A 峰值灌电流/拉电流 DDR 终端稳压器 | DSQ | 10 | -40 to 105

TPS51206DSQT 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SON
包装说明:HVSON,针数:10
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:0.85差分输出:NO
接口集成电路类型:BUS TERMINATOR SUPPORT CIRCUITJESD-30 代码:S-PDSO-N10
JESD-609代码:e4长度:2 mm
湿度敏感等级:2功能数量:1
端子数量:10最高工作温度:105 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:HVSON封装形状:SQUARE
封装形式:SMALL OUTLINE, HEAT SINK/SLUG, VERY THIN PROFILE峰值回流温度(摄氏度):260
认证状态:Not Qualified座面最大高度:0.8 mm
最大压摆率:0.005 mA最大供电电压:6.5 V
最小供电电压:3.1 V标称供电电压:5 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:NO LEAD
端子节距:0.4 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:2 mm
Base Number Matches:1

TPS51206DSQT 数据手册

 浏览型号TPS51206DSQT的Datasheet PDF文件第2页浏览型号TPS51206DSQT的Datasheet PDF文件第3页浏览型号TPS51206DSQT的Datasheet PDF文件第4页浏览型号TPS51206DSQT的Datasheet PDF文件第5页浏览型号TPS51206DSQT的Datasheet PDF文件第6页浏览型号TPS51206DSQT的Datasheet PDF文件第7页 
TPS51206  
www.ti.com  
SLUSAH1 MAY 2011  
2-A Peak Sink/Source DDR Termination Regulator with VTTREF Buffered Reference For  
DDR2, DDR3 and DDR3L  
Check for Samples: TPS51206  
1
FEATURES  
APPLICATIONS  
2
Supply Input Voltage: Supports 3.3-V Rail and  
5-V Rail  
DDR2/DDR3/DDR3L Memory Power Supplies  
SSTL_18, SSTL_15, SSTL_135 and HSTL  
Termination  
VLDOIN Input Voltage Range: VTT+0.4 V to  
3.5 V  
DESCRIPTION  
VTT Termination Regulator  
The TPS51206 is a sink/source double date rate  
(DDR) termination regulator with VTTREF buffered  
reference output. It is specifically designed for low  
input voltage, low cost, low external component count  
systems where space is a key consideration. The  
TPS51206 maintains fast transient response and only  
requires 1 × 10-µF of ceramic output capacitance.  
The TPS51206 supports a remote sensing function  
and all power requirements for DDR2, DDR3 and  
Low-Power DDR3 (DDR3L) VTT bus. The VTT  
current capability is ±2A peak. The TPS51206  
supports all of the DDR power states, putting VTT to  
High-Z in S3 state (suspend to RAM) and discharging  
VTT and VTTREF in S4/S5 state (suspend to disk).  
Output Voltage Range: 0.5 V to 0.9 V  
2-A Peak Sink and Source Current  
Requires Only 10-μF MLCC Output  
Capacitor  
±20 mV Accuracy  
VTTREF Buffered Reference  
VDDQ/2 ± 1% Accuracy  
10-mA Sink/Source Current  
Supports High-Z in S3 and Soft-Stop in S4/S5  
with S3/S5 Inputs  
Over Temperature Protection  
10-pin 2mm x 2mm SON(DSQ) Package  
The TPS51206 is available in 10-pin, 2x2, SON  
(DSQ) PowerPADpackage and specified  
from 40°C to 85°C.  
SIMPLIFIED APPLICATION  
TPS51206  
VDDQSNS  
1
2
VTT  
3
5
VTT  
VDDQ  
VLDOIN VTTSNS  
PGND  
4
6
S3_SLP  
S5_SLP  
7
9
S3  
S5  
VTTREF  
GND  
VTTREF  
8
5 V or 3.3 V  
Supply  
10 VDD  
PowerPad  
UDG-11024  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
PowerPAD is a trademark of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2011, Texas Instruments Incorporated  

TPS51206DSQT 替代型号

型号 品牌 替代类型 描述 数据表
TPS51206DSQR TI

完全替代

具有用于 DDR2/3/3L/4 的 VTTREF 缓冲基准的 2A 峰值灌电流/拉电流

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