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TPS3510DR PDF预览

TPS3510DR

更新时间: 2024-11-25 12:28:15
品牌 Logo 应用领域
德州仪器 - TI 监控PC
页数 文件大小 规格书
18页 520K
描述
PC POWER SUPPLY SUPERVISORS

TPS3510DR 数据手册

 浏览型号TPS3510DR的Datasheet PDF文件第2页浏览型号TPS3510DR的Datasheet PDF文件第3页浏览型号TPS3510DR的Datasheet PDF文件第4页浏览型号TPS3510DR的Datasheet PDF文件第5页浏览型号TPS3510DR的Datasheet PDF文件第6页浏览型号TPS3510DR的Datasheet PDF文件第7页 
ꢀ ꢁꢂꢃ ꢄ ꢅ ꢆ ꢇꢀ ꢁꢂ ꢃꢄ ꢅꢅ  
ꢁꢈ ꢁꢉ ꢊ ꢋꢌ ꢂꢍꢁ ꢁꢎꢏ ꢂꢍꢁ ꢋ ꢌꢐ ꢑꢂ ꢉ ꢌ ꢂ  
SLVS312A – JULY 2000 – REVISED DECEMBER 2002  
D OR P PACKAGE  
(TOP VIEW)  
D
D
D
D
D
D
Overvoltage Protection and Lockout for  
12 V, 5 V, 3.3 V  
Undervoltage Protection and Lockout for  
5 V and 3.3 V  
PGI  
GND  
PGO  
1
2
3
4
8
7
6
5
V
DD  
Fault Protection Output With Open-Drain  
Output Stage  
FPO  
VS5  
PSON  
VS33  
Open-Drain Power Good Output Signal for  
Power Good Input, 3.3 V and 5 V  
Power Good Delay; 300-ms TPS3510,  
150-ms TPS3511  
75-ms Delay for 5-V and 3.3-V Power  
Supply Short-Circuit Turnon Protection  
D
D
D
D
2.3-ms PSON Control to FPO Turnoff Delay  
38-ms PSON Control Debounce  
73-µs Width Noise Deglitches  
Wide Supply Voltage Range From 4 V  
to 15 V  
description  
The TPS3510/1 is designed to minimize external components of personal-computer switching power supply  
systems. It provides protection circuits, power good indicator, fault protection output (FPO) and PSON control.  
Overvoltage protection (OVP) monitors 3.3 V, 5 V, and 12 V (12-V signal detects via V  
pin). Undervoltage  
DD  
protection (UVP) monitors 3.3 V and 5 V. When an OV or UV condition is detected, the power good output (PGO)  
is set to low and FPO is latched high. PSON from low to high resets the protection latch. UVP function is enabled  
75 ms after PSON is set low and debounced. Furthermore, there is a 2.3-ms delay (and an additional 38-ms  
debounce) at turnoff. There is no delay during turnon.  
Power good feature monitors PGI, 3.3 V and 5 V and issues a power good signal when the output is ready.  
The TPS3510/1 is characterized for operation from –40°C to 85°C.  
typical application  
5 V  
SB  
PGI  
PGO  
12 V  
0.5 V  
Drop  
1
2
3
4
8
7
6
5
PGI  
PGO  
V
SB  
GND  
FPO  
V
DD  
VS5  
5 V  
PSON VS33  
PSON  
(From Motherboard)  
3.3 V  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2002, Texas Instruments Incorporated  
ꢁꢙ ꢘ ꢤꢟꢞ ꢜ ꢝ ꢞ ꢘꢖ ꢗꢘ ꢙ ꢚ ꢜ ꢘ ꢝ ꢡꢠ ꢞ ꢕꢗ ꢕꢞꢛ ꢜꢕ ꢘꢖꢝ ꢡꢠ ꢙ ꢜꢦ ꢠ ꢜꢠ ꢙ ꢚꢝ ꢘꢗ ꢀꢠꢧ ꢛꢝ ꢑꢖꢝ ꢜꢙ ꢟꢚ ꢠꢖꢜ ꢝ  
ꢝ ꢜ ꢛ ꢖꢤ ꢛ ꢙꢤ ꢨ ꢛ ꢙꢙ ꢛ ꢖ ꢜꢩꢥ ꢁꢙ ꢘ ꢤꢟꢞ ꢜꢕꢘꢖ ꢡꢙ ꢘꢞ ꢠꢝ ꢝꢕ ꢖꢪ ꢤꢘꢠ ꢝ ꢖꢘꢜ ꢖꢠ ꢞꢠ ꢝꢝ ꢛꢙ ꢕꢣ ꢩ ꢕꢖꢞ ꢣꢟꢤ ꢠ  
ꢜ ꢠ ꢝ ꢜꢕ ꢖꢪ ꢘꢗ ꢛ ꢣꢣ ꢡꢛ ꢙ ꢛ ꢚ ꢠ ꢜ ꢠ ꢙ ꢝ ꢥ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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