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TPS3510D PDF预览

TPS3510D

更新时间: 2024-11-24 22:52:55
品牌 Logo 应用领域
德州仪器 - TI 监控PC
页数 文件大小 规格书
13页 222K
描述
PC POWER SUPPLY SUPERVISORS

TPS3510D 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP8,.25针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:1 week
风险等级:0.71可调阈值:NO
模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUITJESD-30 代码:R-PDSO-G8
JESD-609代码:e4长度:4.9 mm
湿度敏感等级:1信道数量:3
功能数量:1端子数量:8
最高工作温度:85 °C最低工作温度:-40 °C
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP8,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):260
电源:4/15 V认证状态:Not Qualified
座面最大高度:1.58 mm子类别:Power Management Circuits
最大供电电流 (Isup):1 mA最大供电电压 (Vsup):15 V
最小供电电压 (Vsup):4 V标称供电电压 (Vsup):5 V
表面贴装:YES温度等级:INDUSTRIAL
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
阈值电压标称:2.2处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.91 mmBase Number Matches:1

TPS3510D 数据手册

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SLVS312A – JULY 2000 – REVISED DECEMBER 2002  
D OR P PACKAGE  
(TOP VIEW)  
D
D
D
D
D
D
Overvoltage Protection and Lockout for  
12 V, 5 V, 3.3 V  
Undervoltage Protection and Lockout for  
5 V and 3.3 V  
PGI  
GND  
PGO  
1
2
3
4
8
7
6
5
V
DD  
Fault Protection Output With Open-Drain  
Output Stage  
FPO  
VS5  
PSON  
VS33  
Open-Drain Power Good Output Signal for  
Power Good Input, 3.3 V and 5 V  
Power Good Delay; 300-ms TPS3510,  
150-ms TPS3511  
75-ms Delay for 5-V and 3.3-V Power  
Supply Short-Circuit Turnon Protection  
D
D
D
D
2.3-ms PSON Control to FPO Turnoff Delay  
38-ms PSON Control Debounce  
73-µs Width Noise Deglitches  
Wide Supply Voltage Range From 4 V  
to 15 V  
description  
The TPS3510/1 is designed to minimize external components of personal-computer switching power supply  
systems. It provides protection circuits, power good indicator, fault protection output (FPO) and PSON control.  
Overvoltage protection (OVP) monitors 3.3 V, 5 V, and 12 V (12-V signal detects via V  
pin). Undervoltage  
DD  
protection (UVP) monitors 3.3 V and 5 V. When an OV or UV condition is detected, the power good output (PGO)  
is set to low and FPO is latched high. PSON from low to high resets the protection latch. UVP function is enabled  
75 ms after PSON is set low and debounced. Furthermore, there is a 2.3-ms delay (and an additional 38-ms  
debounce) at turnoff. There is no delay during turnon.  
Power good feature monitors PGI, 3.3 V and 5 V and issues a power good signal when the output is ready.  
The TPS3510/1 is characterized for operation from –40°C to 85°C.  
typical application  
5 V  
SB  
PGI  
PGO  
12 V  
0.5 V  
Drop  
1
2
3
4
8
7
6
5
PGI  
PGO  
V
SB  
GND  
FPO  
V
DD  
VS5  
5 V  
PSON VS33  
PSON  
(From Motherboard)  
3.3 V  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 2002, Texas Instruments Incorporated  
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1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

TPS3510D 替代型号

型号 品牌 替代类型 描述 数据表
TPS3510DRG4 TI

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适用于开关模式电源的 3 通道监控器 | D | 8 | -40 to 85
TPS3510DG4 TI

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TPS3510DR TI

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