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TPS3103E15MDBVREP

更新时间： 2024-11-13 20:48:07
品牌 Logo 应用领域
德州仪器 - TI 光电二极管
页数 文件大小 规格书
22页 502K
描述
1-CHANNEL POWER SUPPLY SUPPORT CKT, PDSO6, PLASTIC, SOT-23, 6 PIN

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TPS3103E15MDBVREP 技术参数

生命周期：Obsolete零件包装代码：SOT-23
包装说明：LSSOP, TSOP6,.11,37针数：6
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.39.00.01风险等级：5.67
其他特性：RESET THRESHOLD VOLTAGE IS 1.434V; POWER ON RESET GENERATOR可调阈值：NO
模拟集成电路 - 其他类型：POWER SUPPLY SUPPORT CIRCUITJESD-30 代码：R-PDSO-G6
JESD-609代码：e4长度：2.9 mm
信道数量：1功能数量：1
端子数量：6最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：LSSOP封装等效代码：TSOP6,.11,37
封装形状：RECTANGULAR封装形式：SMALL OUTLINE, LOW PROFILE, SHRINK PITCH
电源：0.4/3.3 V认证状态：Not Qualified
座面最大高度：1.45 mm子类别：Power Management Circuits
最大供电电流 (Isup)：0.032 mA最大供电电压 (Vsup)：3.3 V
最小供电电压 (Vsup)：0.8 V标称供电电压 (Vsup)：3.3 V
表面贴装：YES技术：CMOS
温度等级：INDUSTRIAL端子面层：NICKEL PALLADIUM GOLD
端子形式：GULL WING端子节距：0.95 mm
端子位置：DUAL阈值电压标称：+1.434V
宽度：1.6 mmBase Number Matches：1

TPS3103E15MDBVREP 数据手册

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Production Data  
TPS3103xxx-EP  
TPS3106xxx-EP  
TPS3110xxx-EP  
www.ti.com  
SLVS686–OCTOBER 2006  
Ultra-Low Supply-Current/Supply-Voltage Supervisory Circuits  
FEATURES  
APPLICATIONS  
•
Applications Using Low-Power DSPs,  
Microcontrollers, or Microprocessors  
•
Controlled Baseline  
– One Assembly Site  
– One Test Site  
•
•
•
•
•
Portable- and Battery-Powered Equipment  
Intelligent Instruments  
Wireless Communication Systems  
Industrial Equipment  
– One Fabrication Site  
•
•
Extended Temperature Performance of  
–55°C to 125°C  
Notebook/Desktop Computers  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
DESCRIPTION  
•
•
•
Enhanced Product-Change Notification  
The TPS310x and TPS311x families of supervisory  
circuits provide circuit initialization and timing  
supervision, primarily for DSP and processor-based  
systems.  
(1)  
Qualification Pedigree  
Precision Supply Voltage Supervision Range:  
0.9 V, 1.2 V, 1.5 V, 1.6 V, 2 V, and 3.3 V  
•
•
•
High Trip-Point Accuracy: 0.75%  
During power-on, RESET is asserted when the  
supply voltage (VDD) becomes higher than 0.4 V.  
Thereafter, the supervisory circuit monitors VDD and  
keeps the RESET output active as long as VDD  
remains below the threshold voltage (VIT). An internal  
timer delays the return of the output to the inactive  
state to ensure proper system reset. The delay time  
starts after VDD has risen above VIT. When VDD drops  
below VIT, the output becomes active again.  
Supply Current of 1.2 µA (Typ)  
RESET Defined With Input Voltages as Low  
as 0.4 V  
•
Power-On Reset Generator With a Delay Time  
of 130 ms  
•
•
Push/Pull or Open-Drain RESET Outputs  
SOT23-6 Package  
All the devices of this family have a fixed-sense  
threshold voltage (VIT) set by an internal voltage  
divider.  
The TPS3103 and TPS3106 have an active-low,  
open-drain RESET output. The TPS3110 has an  
active-low push/pull RESET.  
(1) Component qualification in accordance with JEDEC and  
industry standards to ensure reliable operation over an  
extended temperature range. This includes, but is not limited  
to, Highly Accelerated Stress Test (HAST) or biased 85/85,  
temperature cycle, autoclave or unbiased HAST,  
The product spectrum is designed for supply  
voltages of 0.9 V up to 3.3 V. The circuits are  
available in SOT23-6 packages. The TPS31xx family  
is characterized for operation over a temperature  
range of –55°C to 125°C.  
electromigration, bond intermetallic life, and mold compound  
life. Such qualification testing should not be viewed as  
justifying use of this component beyond specified  
performance and environmental limits.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2006, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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