Datasheet > TPD6E001_09

TPD6E001_09

更新时间： 2022-12-16 13:07:51

品牌	Logo	应用领域
德州仪器 - TI		/
页数	文件大小	规格书
14页	663K
描述
LOW-CAPACITANCE 6-CHANNEL ±15-kV ESD-PROTECTION ARRAY FOR HIGH-SPEED DATA INTERFACES

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TPD6E001_09 数据手册

TPD6E001

LOW-CAPACITANCE 6-CHANNEL ±15-kV ESD-PROTECTION ARRAY

FOR HIGH-SPEED DATA INTERFACES

www.ti.com

SLLS685C–JULY 2006–REVISED APRIL 2007

APPLICATION INFORMATION

V_BUS

0.1 µF

D+

D–

V_CC

R_T

GND

IO5

IO3

IO1

USB

Controller

IO6

IO4

IO2

V_BUS

D+

D–

GND

Detailed Description

When placed near the connector, the TPD6E001 ESD solution offers little or no signal distortion during normal

operation due to low IO capacitance and ultra-low leakage current specifications. The TPD6E001 ensures that

the core circuitry is protected and the system is functioning properly in the event of an ESD strike. For proper

operation, the following layout/design guidelines should be followed:

1. Place the TPD6E001 solution close to the connector. This allows the TPD6E001 to take away the energy

associated with ESD strike before it reaches the internal circuitry of the system board.

2. Place a 0.1-µF capacitor very close to the V_CCpin. This limits any momentary voltage surge at the IO pin

during the ESD strike event.

3. Ensure that there is enough metallization for the V_CCand GND loop. During normal operation, the

TPD6E001 consumes nA leakage current. But during the ESD event, V_CCand GND may see 15 A to

30 A of current, depending on the ESD level. Sufficient current path enables safe discharge of all the

energy associated with the ESD strike.

4. Leave the unused IO pins floating.

5. The V_CCpin can be connected in two different ways:

a. If the V_CCpin is connected to the system power supply, the TPD6E001 works as a transient suppressor

for any signal swing above V_CC+ V_F. A 0.1-µF capacitor on the device V_CCpin is recommended for ESD

bypass.

b. If the V_CCpin is not connected to the system power supply, the TPD6E001 can tolerate higher signal

swing in the range up to 10V. Please note that a 0.1-µF capacitor is still recommended at the V_CCpin for

ESD bypass.

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