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TNY256G-TL PDF预览

TNY256G-TL

更新时间: 2022-09-29 19:20:12
品牌 Logo 应用领域
帕沃英蒂格盛 - POWERINT /
页数 文件大小 规格书
20页 511K
描述
IC OFFLINE SWIT OTP UVLO HV 8SMD

TNY256G-TL 数据手册

 浏览型号TNY256G-TL的Datasheet PDF文件第2页浏览型号TNY256G-TL的Datasheet PDF文件第3页浏览型号TNY256G-TL的Datasheet PDF文件第4页浏览型号TNY256G-TL的Datasheet PDF文件第6页浏览型号TNY256G-TL的Datasheet PDF文件第7页浏览型号TNY256G-TL的Datasheet PDF文件第8页 
TNY256  
200  
100  
200  
100  
V
V
DC-BUS  
DC-BUS  
0
0
10  
10  
V
V
5
0
BYPASS  
DRAIN  
5
0
BYPASS  
DRAIN  
400  
200  
0
400  
200  
0
V
V
1
2
0
1
2
0
Time (ms)  
Time (ms)  
Figure 8. TNY256 Power-up With External Resistor (2 M)  
Figure 9. TNY256 Power-up Without External Resistor Connected  
to EN/UV Pin.  
Connected to EN/UV Pin.  
powerlevelatthelowestinputvoltage,thecalculatedinductance  
will ramp up the current to the current limit before the DCMAX  
limit is reached.  
ON/OFF Control  
The internal clock of the TNY256 runs all the time. At the  
beginning of each clock cycle, it samples the EN/UV pin to  
decide whether or not to implement a switch cycle. If the  
EN/UV pin is high (< 40 µA), then a switching cycle takes  
place. If the EN/UV pin is low (greater than 50 µA) then no  
switching cycle occurs, and the EN/UV pin status is sampled  
again at the start of the subsequent clock cycle.  
Enable Function  
TNY256 senses the EN/UV pin to determine whether or not to  
proceed with the next switch cycle as described earlier. Once  
a cycle is started, it always completes the cycle (even when the  
EN/UV pin changes state half way through the cycle). This  
operation results in a power supply whose output voltage ripple  
is determined by the output capacitor, amount of energy per  
switch cycle and the delay of the feedback.  
At full load, TNY256 will conduct during the majority of its  
clock cycles (Figure6). At loads less than full load, it will  
skipmorecyclesinordertomaintainvoltageregulationatthe  
secondaryoutput. Atlightloadornoload, almostallcycleswill  
be skipped (Figure7). A small percentage of cycles will  
conducttosupportthepowerconsumptionofthepowersupply.  
The EN/UV pin signal is generated on the secondary by  
comparing the power supply output voltage with a reference  
voltage. The EN/UV pin signal is high when the power supply  
output voltage is less than the reference voltage.  
The response time of the TNY256 ON/OFF control scheme is  
veryfastcomparedtonormalPWMcontrol. Thisprovidestight  
regulation and excellent transient response.  
In a typical implementation, the EN/UV pin is driven by an  
optocoupler. The collector of the optocoupler transistor is  
connected to the EN/UV pin and the emitter is connected to the  
SOURCEpin. TheoptocouplerLEDisconnectedinserieswith  
a Zener across the DC output voltage to be regulated. When the  
output voltage exceeds the target regulation voltage level  
(optocoupler diode voltage drop plus Zener voltage), the  
optocoupler diode will start to conduct, pulling the EN/UV pin  
low. The Zener can be replaced by a TL431 device for  
improved accuracy.  
Power Up/Down  
The TNY256 requires only a 0.1 µF capacitor on the BYPASS  
pin. Because of the small size of this capacitor, the power-up  
delay is kept to an absolute minimum, typically 0.3 ms. Due to  
the fast nature of the ON/OFF feedback, there is no overshoot  
at the power supply output. When an external resistor (2 M)  
is connected to the EN/UV pin, the power MOSFET switching  
will be delayed during power-up until the DC line voltage  
exceeds the threshold (100 V). Figures 8 and 9 illustrate the  
power-up timing waveform of TNY256 in applications with  
and without an external resistor (2 M) connected to the  
EN/UV pin.  
The EN/UV pin pull-down current threshold is nominally  
50 µA, but is set to 40 µA the instant the threshold is exceeded.  
This is reset back to 50 µA when the EN/UV pull-down current  
drops below the current threshold of 40 µA.  
C
5
7/01  

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