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TMS320LF2402APGS4 PDF预览

TMS320LF2402APGS4

更新时间: 2024-10-26 14:17:07
品牌 Logo 应用领域
德州仪器 - TI 时钟外围集成电路
页数 文件大小 规格书
117页 1525K
描述
40MHz, OTHER DSP, PQFP64, PLASTIC, QFP-64

TMS320LF2402APGS4 技术参数

生命周期:Obsolete零件包装代码:QFP
包装说明:QFP,针数:64
Reach Compliance Code:unknownECCN代码:3A991.A.2
HTS代码:8542.31.00.01风险等级:5.32
桶式移位器:YES边界扫描:YES
最大时钟频率:40 MHz格式:FIXED POINT
内部总线架构:MULTIPLEJESD-30 代码:S-PQFP-G64
长度:20 mm低功率模式:YES
端子数量:64最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:QFP封装形状:RECTANGULAR
封装形式:FLATPACK认证状态:Not Qualified
座面最大高度:3.1 mm最大供电电压:3.6 V
最小供电电压:3 V标称供电电压:3.3 V
表面贴装:YES技术:CMOS
温度等级:AUTOMOTIVE端子形式:GULL WING
端子节距:1 mm端子位置:QUAD
宽度:14 mmuPs/uCs/外围集成电路类型:DIGITAL SIGNAL PROCESSOR, OTHER
Base Number Matches:1

TMS320LF2402APGS4 数据手册

 浏览型号TMS320LF2402APGS4的Datasheet PDF文件第2页浏览型号TMS320LF2402APGS4的Datasheet PDF文件第3页浏览型号TMS320LF2402APGS4的Datasheet PDF文件第4页浏览型号TMS320LF2402APGS4的Datasheet PDF文件第5页浏览型号TMS320LF2402APGS4的Datasheet PDF文件第6页浏览型号TMS320LF2402APGS4的Datasheet PDF文件第7页 
ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢆꢇ ꢄ ꢈ ꢅ ꢉꢊ ꢀ ꢁꢂ ꢃ ꢄ ꢅ ꢆꢇ ꢄ ꢈ ꢅ ꢋꢊ ꢀ ꢁꢂ ꢃ ꢄꢅ ꢆꢇ ꢄꢈꢅ ꢄ  
ꢌꢂ ꢍ ꢎꢏ ꢐꢀꢑ ꢏ ꢆꢆ ꢒꢑ ꢂ  
SPRS094I − APRIL 1999 − REVISED SEPTEMBER 2003  
D
TMS320LF2407, TMS320LF2406, and  
TMS320LF2402 are Being Replaced by  
TMS320LF2407A, TMS320LF2406A, and  
TMS320LF2402A, Respectively. Hence,  
TMS320LF2407, TMS320LF2406, and  
TMS320LF2402 are NOT RECOMMENDED  
FOR NEW DESIGNS (NRND).  
D
External Memory Interface (LF2407)  
− 192K Words x 16 Bits of Total Memory:  
64K Program, 64K Data, 64K I/O  
D
D
Watchdog (WD) Timer Module  
10-Bit Analog-to-Digital Converter (ADC)  
− 8 or 16 Multiplexed Input Channels  
− 500 ns Minimum Conversion Time  
− Selectable Twin 8-Input Sequencers  
Triggered by Two Event Managers  
D
D
D
High-Performance Static CMOS Technology  
− 33-ns Instruction Cycle Time (30 MHz)  
− 30-MIPS Performance  
D
D
D
D
D
Controller Area Network (CAN) 2.0B Module  
Serial Communications Interface (SCI)  
− Low-Power 3.3-V Design  
Based on TMS320C2xx DSP CPU Core  
− Code-Compatible With F243/F241/C242  
− Instruction Set and Module Compatible  
With F240/C240  
16-Bit Serial Peripheral Interface (SPI)  
Module  
Phase-Locked-Loop (PLL)-Based Clock  
Generation  
On-Chip Memory  
− Up to 32K Words x 16 Bits of Flash  
EEPROM (4 Sectors)  
− Up to 2.5K Words x 16 Bits of  
Data/Program RAM  
Up to 40 Individually Programmable,  
Multiplexed General-Purpose Input/Output  
(GPIO) Pins  
D
D
Up to Five External Interrupts (Power Drive  
Protection, Reset, and Two Maskable  
Interrupts)  
− 544 Words of Dual-Access RAM  
− Up to 2K Words of Single-Access RAM  
D
D
Boot ROM  
Power Management:  
− SCI/SPI Bootloader  
− Three Power-Down Modes  
− Ability to Power Down Each Peripheral  
Independently  
Two Event-Manager (EV) Modules (EVA and  
EVB), Each Include:  
− Two 16-Bit General-Purpose Timers  
− Eight 16-Bit Pulse-Width Modulation  
(PWM) Channels Which Enable:  
− Three-Phase Inverter Control  
− Center- or Edge-Alignment of PWM  
Channels  
− Emergency PWM Channel Shutdown  
With External PDPINTx Pin  
− Programmable Deadband (Deadtime)  
Prevents Shoot-Through Faults  
− Three Capture Units For Time-Stamping  
of External Events  
− On-Chip Position Encoder Interface  
Circuitry  
− Synchronized Analog-to-Digital  
Conversion  
− Designed for AC Induction, BLDC,  
Switched Reluctance, and Stepper Motor  
Control  
− Applicable for Multiple Motor and/or  
Converter Control  
D
D
Real-Time JTAG-Compliant Scan-Based  
Emulation, IEEE Standard 1149.1 (JTAG)  
Development Tools Include:  
− Texas Instruments (TI) ANSI C Compiler,  
Assembler/Linker, and Code Composer  
StudioDebugger  
− Evaluation Modules  
− Scan-Based Self-Emulation (XDS510)  
− Broad Third-Party Digital Motor Control  
Support  
D
D
Package Options  
− 144-Pin Low-Profile Quad Flatpack  
(LQFP) PGE (LF2407)  
− 100-Pin LQFP PZ (LF2406)  
− 64-Pin Quad Flatpack (QFP) PG (LF2402)  
Extended Temperature Options (A and S)  
− A: − 40°C to 85°C  
− S: − 40°C to 125°C  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Code Composer Studio and XDS510 are trademarks of Texas Instruments.  
IEEE Standard 1149.1−1990, IEEE Standard Test-Access Port  
ꢀꢡ  
Copyright 2002, Texas Instruments Incorporated  
ꢝ ꢡ ꢞ ꢝꢖ ꢗꢫ ꢙꢘ ꢜ ꢤꢤ ꢢꢜ ꢚ ꢜ ꢛ ꢡ ꢝ ꢡ ꢚ ꢞ ꢦ  
1
POST OFFICE BOX 1443 HOUSTON, TEXAS 77251−1443  

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