TM497EU9
4194304-WORD BY 9-BIT
DYNAMIC RAM MODULE
SMMS499A – FEBRUARY 1994 – REVISED JUNE 1995
Organization . . . 4194304 × 9
U SINGLE-IN-LINE PACKAGE
(TOP VIEW)
Single 5-V Power Supply (±10% Tolerance)
30-Pin Single-In-Line Memory Module
(SIMM) for Use With Sockets
V
1
2
3
4
5
6
7
8
9
CC
Utilizes One 4-Megabit and Two 16-Megabit
Dynamic RAMs in Plastic Small-Outline
J-Lead (SOJ) Packages
CAS
DQ1
A0
A1
Long Refresh Period
DQ2
A2
†
32 ms (2048 Cycles)
A3
All Inputs, Outputs, and Clocks Fully TTL
Compatible
V
SS
DQ3 10
A4 11
3-State Outputs
A5 12
DQ4 13
A6 14
A7 15
DQ5 16
A8 17
A9 18
A10 19
DQ6 20
21
22
DQ7 23
NC 24
Performance Ranges:
ACCESS ACCESS ACCESS READ OR
TIME
(t
(MAX)
60 ns
70 ns
80 ns
TIME
TIME
(t )
CAC
(MAX)
15 ns
18 ns
20 ns
WRITE
CYCLE
(MIN)
110 ns
130 ns
150 ns
)
t
RAC
(AA)
(MAX)
30 ns
35 ns
40 ns
’497EU9-60
’497EU9-70
’497EU9-80
W
Common CAS Control for Eight Common
Data-In and Data-Out Lines
V
SS
Separate CAS Control for One Separate
Pair of Data-In and Data-Out Lines
DQ8 25
Q9 26
RAS 27
CAS9 28
D9 29
Low Power Dissipation
Operating Free-Air Temperature Range
V
CC
30
0°C to 70°C
Enhanced Page Mode Operation With
CAS-Before-RAS (CBR), RAS-Only, and
Hidden Refresh
description
PIN NOMENCLATURE
The TM497EU9 is
a
4M-byte dynamic
random-access memory (RAM) organized as
4194304 × 9 bits [bit nine (D9, Q9) is generally
used for parity and is controlled by CAS9] in a
30-pin leadless single-in-line memory module
(SIMM). The SIMM is composed of two
TMS417400DJ, 4194304 × 4-bit dynamic RAMs,
each in a 24/26-lead plastic small-outline J-lead
(SOJ) package, and one TMS44100DJ, 4194304
× 1-bit dynamic RAM in a 20/26-lead plastic SOJ
package, mounted on a substrate with decoupling
capacitors.
A0–A10
Address Inputs
CAS, CAS9
DQ1–DQ8
D9
Column-Address Strobe
Data In/Data Out
Data In
NC
No Connection
Data Out
Q9
RAS
Row-Address Strobe
5-V Supply
V
V
CC
Ground
SS
W
Write Enable
The TM497EU9 is available in the U single-sided, leadless module for use with sockets and is characterized
for operation from 0°C to 70°C.
†
A0–A9 address lines must be refreshed every 16 ms.
Copyright 1995, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
1
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