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TLV5618A-EP PDF预览

TLV5618A-EP

更新时间: 2024-11-19 12:22:27
品牌 Logo 应用领域
德州仪器 - TI 转换器
页数 文件大小 规格书
17页 395K
描述
2.7-V TO 5.5-V LOW-POWER DUAL 12-BIT DIGITAL-TO-ANALOG CONVERTER WITH POWER DOWN

TLV5618A-EP 数据手册

 浏览型号TLV5618A-EP的Datasheet PDF文件第2页浏览型号TLV5618A-EP的Datasheet PDF文件第3页浏览型号TLV5618A-EP的Datasheet PDF文件第4页浏览型号TLV5618A-EP的Datasheet PDF文件第5页浏览型号TLV5618A-EP的Datasheet PDF文件第6页浏览型号TLV5618A-EP的Datasheet PDF文件第7页 
ꢀ ꢁꢂ ꢃꢄ ꢅꢆ ꢇꢈ ꢉꢊ  
ꢋ ꢌꢍ ꢈꢂ ꢀ ꢎ ꢃ ꢌꢃ ꢈꢂ ꢁ ꢎꢏꢈꢊꢎ ꢏ ꢉꢐ ꢑꢒꢇ ꢁ ꢅꢋ ꢈꢓ ꢔ ꢀ  
ꢑꢔ ꢕꢔ ꢀꢇꢁ ꢈꢀꢎ ꢈꢇꢖꢇꢁ ꢎ ꢕ ꢗꢎ ꢖꢂꢉ ꢐꢀ ꢉꢐ ꢏ ꢔꢀ ꢘ ꢊꢎ ꢏꢉ ꢐ ꢑ ꢎꢏ ꢖ  
SGLS214 − OCTOBER 2003  
D
D
D
D
Compatible With TMS320 and SPI Serial  
Ports  
features  
D
Controlled Baseline  
− One Assembly/Test Site, One Fabrication  
Site  
Differential Nonlinearity <0.5 LSB Typ  
Monotonic Over Temperature  
D
D
Extended Temperature Performance of  
−55°C to 125°C  
Enhanced Diminishing Manufacturing  
Sources (DMS) Support  
Direct Replacement for TLC5618A  
applications  
D
D
D
D
D
Digital Servo Control Loops  
D
D
D
D
Enhanced Product-Change Notification  
Digital Offset and Gain Adjustment  
Industrial Process Control  
Qualification Pedigree  
Dual 12-Bit Voltage Output DAC  
Machine and Motion Control Devices  
Mass Storage Devices  
Programmable Settling Time  
− 3 µs in Fast Mode  
− 10 µs in Slow Mode  
D PACKAGE  
(TOP VIEW)  
Component qualification in accordance with JEDEC and industry  
standards to ensure reliable operation over an extended  
temperature range. This includes, but is not limited to, Highly  
Accelerated Stress Test (HAST) or biased 85/85, temperature  
cycle, autoclave or unbiased HAST, electromigration, bond  
intermetallic life, and mold compound life. Such qualification  
testing should not be viewed as justifying use of this component  
beyond specified performance and environmental limits.  
DIN  
SCLK  
CS  
V
DD  
OUTB  
REF  
1
2
3
4
8
7
6
5
OUTA  
AGND  
description  
The TLV5618A is a dual 12-bit voltage output DAC with a flexible 3-wire serial interface. The serial interface is  
compatible with TMS320, SPI, QSPI, and Microwireserial ports. It is programmed with a 16-bit serial string  
containing 4 control and 12 data bits.  
The resistor string output voltage is buffered by an x2 gain rail-to-rail output buffer. The buffer features a  
Class-AB output stage to improve stability and reduce settling time. The programmable settling time of the DAC  
allows the designer to optimize speed versus power dissipation.  
Implemented with a CMOS process, the device is designed for single supply operation from 2.7 V to 5.5 V. It  
is available in an 8-pin SOIC package.  
The TLV5618AM is characterized for operation from 55°C to 125°C.  
ORDERING INFORMATION  
ORDERABLE  
PART NUMBER  
TOP-SIDE  
MARKING  
T
A
PACKAGE  
−55°C to 125°C  
SOIC (D)  
Tape and reel  
TLV5618AMDREP  
5618ME  
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines  
are available at www.ti.com/sc/package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
SPI and QSPI are trademarks of Motorola, Inc.  
Microwire is a trademark of National Semiconductor Corporation.  
ꢀꢤ  
Copyright 2003 Texas Instruments Incorporated  
ꢠ ꢤ ꢡ ꢠꢙ ꢚꢭ ꢜꢛ ꢟ ꢧꢧ ꢥꢟ ꢝ ꢟ ꢞ ꢤ ꢠ ꢤ ꢝ ꢡ ꢌ  
ꢡꢙ  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

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