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TLV5616CDGKR PDF预览

TLV5616CDGKR

更新时间: 2024-11-20 13:14:51
品牌 Logo 应用领域
德州仪器 - TI 转换器
页数 文件大小 规格书
23页 311K
描述
SERIAL INPUT LOADING, 9us SETTLING TIME, 12-BIT DAC, PDSO8, GREEN, PLASTIC, MSOP-8

TLV5616CDGKR 技术参数

是否Rohs认证:符合生命周期:Obsolete
零件包装代码:MSOP包装说明:TSSOP, TSSOP8,.19
针数:8Reach Compliance Code:unknown
风险等级:5.23Is Samacsys:N
最大模拟输出电压:3.2 V最小模拟输出电压:
转换器类型:D/A CONVERTER输入位码:BINARY
输入格式:SERIALJESD-30 代码:S-PDSO-G8
长度:3 mm最大线性误差 (EL):0.0977%
位数:12功能数量:1
端子数量:8最高工作温度:70 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:TSSOP封装等效代码:TSSOP8,.19
封装形状:SQUARE封装形式:SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
峰值回流温度(摄氏度):NOT SPECIFIED电源:3/5 V
认证状态:Not Qualified座面最大高度:1.1 mm
最大稳定时间:20 µs标称安定时间 (tstl):9 µs
子类别:Other Converters最大压摆率:1.35 mA
标称供电电压:3 V表面贴装:YES
技术:CMOS温度等级:COMMERCIAL
端子形式:GULL WING端子节距:0.65 mm
端子位置:DUAL处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3 mmBase Number Matches:1

TLV5616CDGKR 数据手册

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TLV5616C, TLV5616I  
2.7 V TO 5.5 V LOW POWER 12-BIT DIGITAL-TO-ANALOG  
CONVERTERS WITH POWER DOWN  
SLAS152B – DECEMBER 1997 – REVISED MARCH 1999  
12-Bit Voltage Output DAC  
Voltage Output Range . . . 2 Times the  
Reference Input Voltage  
Programmable Settling Time vs Power  
Consumption  
Monotonic Over Temperature  
Available in MSOP Package  
3 µs in Fast Mode  
9 µs in Slow Mode  
Ultra Low Power Consumption:  
900 µW Typ in Slow Mode at 3 V  
2.1 mW Typ in Fast Mode at 3 V  
applications  
Digital Servo Control Loops  
Digital Offset and Gain Adjustment  
Industrial Process Control  
Differential Nonlinearity . . . <0.5 LSB Typ  
Compatible With TMS320 and SPI Serial  
Ports  
Machine and Motion Control Devices  
Mass Storage Devices  
Power-Down Mode (10 nA)  
Buffered High-Impedance Reference Input  
D, DGK, OR P PACKAGE  
(TOP VIEW)  
description  
The TLV5616 is  
a 12-bit voltage output  
digital-to-analog converter (DAC) with a flexible  
4-wire serial interface. The 4-wire serial interface  
allows glueless interface to TMS320, SPI, QSPI,  
and Microwire serial ports. The TLV5616 is  
programmed with a 16-bit serial string containing  
4 control and 12 data bits. Developed for a wide  
range of supply voltages, the TLV5616 can  
operate from 2.7 V to 5.5 V.  
DIN  
SCLK  
CS  
V
DD  
OUT  
1
2
3
4
8
7
6
5
REFIN  
AGND  
FS  
The resistor string output voltage is buffered by a x2 gain rail-to-rail output buffer. The buffer features a Class AB  
output stage to improve stability and reduce settling time. The settling time of the DAC is programmable to allow  
the designer to optimize speed versus power dissipation. The settling time is chosen by the control bits within  
the 16-bit serial input string. A high-impedance buffer is integrated on the REFIN terminal to reduce the need  
for a low source impedance drive to the terminal.  
Implemented with a CMOS process, the TLV5616 is designed for single supply operation from 2.7 V to 5.5 V.  
The device is available in an 8-terminal SOIC package. The TLV5616C is characterized for operation from 0°C  
to 70°C. The TLV5616I is characterized for operation from 40°C to 85°C.  
AVAILABLE OPTIONS  
PACKAGE  
T
A
SMALL OUTLINE  
(D)  
MSOP  
(DGK)  
PLASTIC DIP  
(P)  
0°C to 70°C  
TLV5616CD  
TLV5616ID  
TLV5616CDGK  
TLV5616IDGK  
TLV5616CP  
TLV5616IP  
40°C to 85°C  
Available in tape and reel as the TLV5616CDR and the TLV5616IDR  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
Copyright 1999, Texas Instruments Incorporated  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of Texas Instruments  
standard warranty. Production processing does not necessarily include  
testing of all parameters.  
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265  

TLV5616CDGKR 替代型号

型号 品牌 替代类型 描述 数据表
TLV5616IDGK TI

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