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TLV5614Y PDF预览

TLV5614Y

更新时间: 2024-11-20 12:22:35
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德州仪器 - TI /
页数 文件大小 规格书
24页 231K
描述
2.7-V TO 5.5-V, 12-BIT QUAD DAC IN WAFER CHIP SCALE PACKAGE

TLV5614Y 数据手册

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www.ti.com  
ꢀ ꢁꢂ ꢃꢄ ꢅꢆ ꢇꢈ ꢉ  
SLAS391A − JULY 2003 − REVISED AUGUST 2003  
ꢊ ꢋꢌ ꢍ ꢂ ꢀ ꢎ ꢃꢋ ꢃꢍ ꢂꢏ ꢅꢊ ꢍ ꢐꢇ ꢀ ꢑ ꢒꢓ ꢔ ꢔ ꢓꢕ ꢇ ꢖ  
ꢗꢓ ꢘ ꢉꢙ ꢕ ꢚꢇ ꢛ ꢜ ꢕꢓ ꢁꢉ ꢛꢓ ꢕꢝꢓ ꢞ ꢉ  
FEATURES  
APPLICATIONS  
D
Four 12-Bit D/A Converters  
D
D
D
D
D
D
Battery Powered Test Instruments  
Digital Offset and Gain Adjustment  
Industrial Process Controls  
Machine and Motion Control Devices  
Communications  
D
Programmable Settling Time of Either 3 µs or  
9 µs Typ  
TMS320DSP Family, (Q)SPI, and  
MicrowireCompatible Serial Interface  
D
D
Internal Power-On Reset  
Arbitrary Waveform Generation  
D
Low Power Consumption:  
8 mW, Slow Mode − 5-V Supply  
3.6 mW, Slow Mode − 3-V Supply  
WCS PACKAGE  
(BOTTOM VIEW)  
OUTA OUTB OUTC OUTD  
D
D
Reference Input Buffer  
Voltage Output Range . . . 2× the Reference  
Input Voltage  
14 13  
15  
12  
11  
10  
REFINAB  
REFINCD  
D
Monotonic Over Temperature  
AV  
16  
1
DD  
DD  
AGND  
DGND  
FS  
9
D
Dual 2.7-V to 5.5-V Supply (Separate Digital  
and Analog Supplies)  
DV  
8
7
2
PD  
3
4
5
6
D
D
D
Hardware Power Down (10 nA)  
Software Power Down (10 nA)  
Simultaneous Update  
LDAC DIN  
SCLK CS  
DESCRIPTION  
The TLV5614IYE is a quadruple 12-bit voltage output digital-to-analog converter (DAC) with a flexible 4-wire serial  
interface. The serial interface allows glueless interface to TMS320, SPI, QSPI, and Microwire serial ports. The TLV5614IYE  
is programmed with a 16-bit serial word comprised of a DAC address, individual DAC control bits, and a 12-bit DAC value.  
The device has provision for two supplies: one digital supply for the serial interface (via pins DV and DGND), and one  
DD  
for the DACs, reference buffers, and output buffers (via pins AV and AGND). Each supply is independent of the other,  
DD  
and can be any value between 2.7 V and 5.5 V. The dual supplies allow a typical application where the DAC is controlled  
via a microprocessor operating on a 3 V supply (also used on pins DV and DGND), with the DACs operating on a 5 V  
DD  
supply. Of course, the digital and analog supplies can be tied together.  
The resistor string output voltage is buffered by a x2 gain rail-to-rail output buffer. The buffer features a Class AB output  
stage to improve stability and reduce settling time. A rail-to-rail output stage and a power-down mode makes it ideal for  
single voltage, battery based applications. The settling time of the DAC is programmable to allow the designer to optimize  
speed versus power dissipation. The settling time is chosen by the control bits within the 16-bit serial input string. A  
high-impedance buffer is integrated on the REFINAB and REFINCD terminals to reduce the need for a low source  
impedance drive to the terminal. REFINAB and REFINCD allow DACs A and B to have a different reference voltage then  
DACs C and D.  
The TLV5614IYE is implemented with a CMOS process and is available in a 16-terminal WCS package. The TLV5614IYE  
is characterized for operation from 40°C to 85°C in a wire-bonded small outline (SOIC) package.  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments  
semiconductor products and disclaimers thereto appears at the end of this data sheet.  
TMS320 DSP is a trademark of Texas Instruments.  
SPI and QSPI are trademarks of Motorola, Inc.  
Microwire is a trademark of National Semiconductor Corporation.  
ꢛꢙ ꢎ ꢔꢒ ꢕ ꢀꢇ ꢎꢖ ꢔ ꢓꢀꢓ ꢟꢠ ꢡꢢ ꢣ ꢤꢥ ꢦꢟꢢꢠ ꢟꢧ ꢨꢩ ꢣ ꢣ ꢪꢠꢦ ꢥꢧ ꢢꢡ ꢫꢩꢬ ꢭꢟꢨ ꢥꢦꢟ ꢢꢠ ꢮꢥ ꢦꢪꢋ ꢛꢣ ꢢꢮꢩ ꢨꢦꢧ  
ꢨ ꢢꢠ ꢡꢢꢣ ꢤ ꢦꢢ ꢧ ꢫꢪ ꢨ ꢟ ꢡꢟ ꢨ ꢥ ꢦꢟ ꢢꢠꢧ ꢫ ꢪꢣ ꢦꢯꢪ ꢦꢪ ꢣ ꢤꢧ ꢢꢡ ꢀꢪꢰ ꢥꢧ ꢇꢠꢧ ꢦꢣ ꢩꢤ ꢪꢠꢦ ꢧ ꢧꢦ ꢥꢠꢮ ꢥꢣ ꢮ ꢱ ꢥꢣ ꢣ ꢥ ꢠꢦꢲꢋ  
ꢛꢣ ꢢ ꢮꢩꢨ ꢦ ꢟꢢ ꢠ ꢫꢣ ꢢ ꢨ ꢪ ꢧ ꢧ ꢟꢠ ꢳ ꢮꢢ ꢪ ꢧ ꢠꢢꢦ ꢠꢪ ꢨꢪ ꢧꢧ ꢥꢣ ꢟꢭ ꢲ ꢟꢠꢨ ꢭꢩꢮ ꢪ ꢦꢪ ꢧꢦꢟ ꢠꢳ ꢢꢡ ꢥꢭ ꢭ ꢫꢥ ꢣ ꢥꢤ ꢪꢦꢪ ꢣ ꢧꢋ  
Copyright 2003, Texas Instruments Incorporated  

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