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TLV320AIC3111_101 PDF预览

TLV320AIC3111_101

更新时间: 2024-11-25 08:43:55
品牌 Logo 应用领域
德州仪器 - TI 解码器编解码器放大器
页数 文件大小 规格书
154页 1506K
描述
Low-Power Audio Codec With Embedded miniDSP and Stereo Class-D Speaker Amplifier

TLV320AIC3111_101 数据手册

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TLV320AIC3111  
www.ti.com  
SLAS644BJULY 2009REVISED OCTOBER 2009  
Low-Power Audio Codec With Embedded miniDSP  
and Stereo Class-D Speaker Amplifier  
Check for Samples: TLV320AIC3111  
1 INTRODUCTION  
1.1 Features  
1.2 Applications  
1234  
• Stereo Audio DAC With 95-dB SNR  
Portable Audio Devices  
• Mono Audio ADC With 91-dB SNR  
• Supports 8-kHz to 192-kHz SepArate DAC and  
ADC Sample Rates  
Mobile Internet Devices  
Adaptive Filtering Applications  
• Instruction-Programmable Embedded miniDSP  
• Stereo 1.29-W Class-D BTL 8-Speaker Driver  
1.3 Description  
With Direct Battery Connection  
The TLV320AIC3111 is  
a
low-power, highly  
integrated, high-performance codec which provides a  
stereo audio DAC and mono audio ADC.  
• One Differential and Three Single-Ended Inputs  
With Mixing and Level Control  
• Microphone With Bias, Preamp PGA, and AGC  
• Built-in Digital Audio Processing Blocks With  
User-Programmable Biquad and FIR Filters  
The TLV320AIC3111 features a high-performance  
audio codec with 16-bit stereo playback and  
monaural record functionality. The device integrates  
several analog features, such as a microphone  
interface, headphone drivers, and speaker drivers.  
• Digital Mixing Capability  
• Programmable Digital Audio Processor for  
Bass Boost/Treble/EQ With up to Five Biquads  
for Record and up to Six Biquads for Playback  
The TLV320AIC3111 has  
a fully programmable  
miniDSP for digital audio processing. The digital  
audio data format is programmable to work with  
• Pin Control or Register Control for  
Digital-Playback Volume-Control Settings  
• Sine-Wave Generator for Beep  
popular  
audio  
standard  
protocols  
(I2S,  
left/right-justified) in master, slave, DSP, and TDM  
modes. Bass boost, treble, or EQ can be supported  
by the programmable digital signal-processing block.  
• Integrated PLL Used for Programmable Digital  
Audio Processor  
• I2S, Left-Justified, Right-Justified, DSP, and  
TDM Audio Interfaces  
An on-chip PLL provides the high-speed clock  
needed by the digital signal processing block. The  
volume level can be controlled by either pin control or  
by register control. The audio functions are controlled  
using the I2C serial bus.  
• I2C Control With Register Auto-Increment  
• Full Power-Down Control  
• Power Supplies:  
– Analog: 2.7 V–3.6 V  
– Digital Core: 1.65 V–1.95 V  
– Digital I/O: 1.1 V–3.6 V  
The TLV320AIC3111 has a programmable beep  
generator and is available in a 32-pin QFN package.  
– Class-D: 2.7 V–5.5V (SPLVDD and SPRVDD ≥  
AVDD)  
• 5-mm × 5-mm 32-QFN Package  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
2
3
4
PurePath is a trademark of Texas Instruments.  
MATLAB is a trademark of The MathWorks, Inc.  
All other trademarks are the property of their respective owners.  
PRODUCTION DATA information is current as of publication date.  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
Copyright © 2009, Texas Instruments Incorporated  

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