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TLV320AIC32
SLAS479A–AUGUST 2005–REVISED SEPTEMBER 2005
LOW POWER STEREO AUDIO CODEC FOR PORTABLE AUDIO/TELEPHONY
FEATURES
DESCRIPTION
•
Stereo Audio DAC
The TLV320AIC32 is a low-power stereo-audio codec
with a stereo headphone amplifier, as well as multiple
inputs and outputs, programmable in single-ended or
– 100 dB A Signal-to-Noise Ratio
– 16/20/24/32-Bit Data
fully-differential
configurations.
Extensive
– Supports Rates From 8 kHz to 96 kHz
– 3D/Bass/Treble/EQ/De-Emphasis Effects
Stereo Audio ADC
register-based power control is included, enabling
stereo 48-kHz DAC playback as low as 14 mW from
a 3.3-V analog supply, making it ideal for portable,
battery-powered audio and telephony applications.
•
– 92 dB A Signal-to-Noise Ratio
– Supports Rates From 8 kHz to 96 kHz
Six Audio Input Pins
The record path of the TLV320AIC32 contains
integrated microphone bias, digitally-controlled
stereo-microphone pre-amp, and automatic gain
control (AGC), with mix/mux capability among the
multiple analog inputs. The playback path includes
mix/mux capability from the stereo DAC and selected
inputs, through programmable volume controls, to the
various outputs.
•
•
– Six Stereo Single-Ended Inputs
Six Audio Output Drivers
– Stereo 8-Ω, 500 mw/Channel Speaker Drive
Capability
– Stereo Fully-Differential or Single-Ended
Headphone Drivers
The TLV320AIC32 contains four high-power output
drivers as well as two fully differential output drivers.
The high-power output drivers are capable of driving
a variety of load configurations, including up to four
channels of single-ended 16-Ω headphones using
ac-coupling capacitors, or stereo 16-Ω headphones in
a cap-less output configuration. In addition, pairs of
drivers can be used to drive 8-Ω speakers in a BTL
configuration at 500 mW per channel.
– Fully Differential Stereo Line Outputs
•
Low Power: 14-mW Stereo, 48-kHz Playback
With 3.3-V Analog Supply
•
•
•
•
Programmable Input/Output Analog Gains
Automatic Gain Control (AGC) for Record
Programmable Microphone Bias Level
Programmable PLL for Flexible Clock
Generation
I2C Control Bus
Audio Serial Data Bus Supports I2S,
Left/Right-Justified, DSP, and TDM Modes
The stereo audio DAC supports sampling rates from
8 kHz to 96 kHz and includes programmable digital
filtering in the DAC path for 3D, bass, treble,
midrange effects, speaker equalization, and
de-emphasis for 32 kHz, 44.1 kHz, and 48 kHz rates.
The stereo-audio ADC supports sampling rates from
8 kHz to 96 kHz and is preceded by programmable
gain amplifiers providing up to +59.5 dB analog gain
for low-level microphone inputs.
The serial control bus supports the I2C protocol, while
the serial-audio data bus is programmable for I2S,
left/right justified, DSP, or TDM modes. A highly
programmable PLL is included for flexible clock
generation and support for all standard audio rates
from a wide range of available MCLKs, varying from
512 kHz to 50 MHz, with special attention paid to the
most popular cases of 12 MHz, 13 MHz, 16 MHz,
19.2 MHz, and 19.68 MHz system clocks.
•
•
•
•
Extensive Modular Power Control
Power Supplies:
– Analog: 2.7 V – 3.6 V
– Digital Core: 1.525 V – 1.95 V
– Digital I/O: 1.1 V – 3.6 V
•
Available Packages: 5 × 5 mm, 32-Pin QFN
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2005, Texas Instruments Incorporated
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