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TLV320AIC20KIPFBRG4 PDF预览

TLV320AIC20KIPFBRG4

更新时间： 2024-11-23 15:54:39
品牌 Logo 应用领域
德州仪器 - TI 商用集成电路
页数 文件大小 规格书
56页 1606K
描述
SPECIALTY CONSUMER CIRCUIT, PQFP48, GREEN, PLASTIC, TQFP-48

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TLV320AIC20KIPFBRG4 技术参数

生命周期：Obsolete零件包装代码：QFP
包装说明：TFQFP,针数：48
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.6其他特性：IT ALSO REQUIRES 1.65V TO 1.95V SUPPLY
商用集成电路类型：CONSUMER CIRCUITJESD-30 代码：S-PQFP-G48
长度：7 mm功能数量：1
端子数量：48最高工作温度：85 °C
最低工作温度：-40 °C封装主体材料：PLASTIC/EPOXY
封装代码：TFQFP封装形状：SQUARE
封装形式：FLATPACK, THIN PROFILE, FINE PITCH认证状态：Not Qualified
座面最大高度：1.2 mm最大供电电压 (Vsup)：3.6 V
最小供电电压 (Vsup)：2.7 V表面贴装：YES
温度等级：INDUSTRIAL端子形式：GULL WING
端子节距：0.5 mm端子位置：QUAD
宽度：7 mmBase Number Matches：1

TLV320AIC20KIPFBRG4 数据手册

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TLV320AIC20, TLV320AIC21  
TLV320AIC24, TLV320AIC25  
TLV320AIC20K, TLV320AIC24K  
www.ti.com  
SLAS363D–MARCH 2002–REVISED APRIL 2005  
Low-Power, Highly-Integrated, Programmable  
16-Bit, 26-KSPS, Dual-Channel CODEC  
FEATURES  
•
Differential and Single-Ended Analog  
Input/Output  
•
•
•
Stereo 16-Bit Oversampling Sigma-Delta A/D  
Converter  
•
Built-In Analog Functions:  
– Analog and Digital Sidetone  
– Antialiasing Filter (AAF)  
Stereo 16-Bit Oversampling Sigma-Delta D/A  
Converter  
Support Maximum Master Clock of 100 MHz to  
Allow DSPs Output Clock to be Used as a  
Master Clock  
– Programmable Input and Output Gain  
Control (PGA)  
– Microphone/Handset/Headset Amplifiers  
•
•
Selectable FIR/IIR Filter With Bypassing  
Option  
– AIC20/21/20K Have a Built-In 8-Ω Speaker  
Driver  
Programmable Sampling Rate up to:  
– Max 26 Ksps With On-Chip IIR/FIR Filter  
– Max 104 Ksps With IIR/FIR Bypassed  
– Power Management With Hardware/Software  
Power-Down Modes 30 µW  
•
•
Separate Software Control for ADC and DAC  
Power Down  
Fully Compatible With Common TMS320® DSP  
Family and Microcontroller Power Supplies  
•
•
On-Chip FIR Produced 84-dB SNR for ADC  
and 92-dB SNR for DAC over 13-Khz BW  
Smart Time Division Multiplexed (SMARTDM®)  
Serial Port  
– 1.65-V - 1.95-V Digital Core Power  
– 1.1-V - 3.6-V Digital I/O  
– Glueless 4-Wire Interface to DSP  
– Automatic Cascade Detection (ACD)  
Self-Generates Master/Slave Device  
Addresses  
– 2.7-V - 3.6-V Analog  
•
•
•
Internal Reference Voltage (Vref  
)
2s Complement Data Format  
– Programming Mode to Allow On-The-Fly  
Reconfiguration  
Test Mode Which Includes Digital Loopback  
and Analog Loopback  
– Continuous Data Transfer Mode to Minimize  
Bit Clock Speed  
APPLICATIONS  
– Support Different Sampling Rate for Each  
Device  
•
•
•
•
•
Wireless Accessories  
Hands-Free Car Kits  
VOIP  
Cable Modem  
Speech Processing  
– Turbo Mode to Maximize Bit Clock For  
Faster Data Transfer and Allow Multiple  
Serial Devices to Share the Same Bus  
– Allows up to Eight Devices to be Connected  
to a Single Serial Port  
•
Host port  
– 2-Wire Interface  
– Selectable I2C or S2C  
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas  
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
SMARTDM, TMS320, TMS320C5000, TMS320C6000 are registered trademarks of Texas Instruments.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 2002–2005, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
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