TLV320ADC6120
SBASA92A – DECEMBER 2020 – REVISED JUNE 2021
TLV320ADC6120 2-Channel, 768-kHz, Burr-BrownTM Audio ADC
1 Features
3 Description
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Multichannel high-performance ADC:
– 2-channel analog microphones or line-in
– 4-channel digital PDM microphones
– Up to 2 analog and up to 2 digital microphone
channels
ADC line and microphone differential input
performance:
– Dynamic range (DR):
The TLV320ADC6120 is
a
Burr-Brown™ high-
performance, audio analog-to-digital converter (ADC)
that supports simultaneous sampling of up to two
analog channels or four digital channels for the
pulse density modulation (PDM) microphone input.
The device supports line and microphone inputs, and
allows for both single-ended and differential input
configurations. The device integrates programmable
channel gain, digital volume control, a programmable
microphone bias voltage, a phase-locked loop (PLL),
a programmable high-pass filter (HPF), biquad filters,
low-latency filter modes, and allows for sample
rates up to 768 kHz, and allows for sample rates
up to 192 kHz. The device supports time-division
multiplexing (TDM), I2S, or left-justified (LJ) audio
formats, and can be controlled with the I2C interface.
These integrated high-performance features, along
with the ability to be powered from a single-supply
of 3.3 V or 1.8 V, make the device an excellent
choice for space-constrained audio systems in far-
field microphone recording applications.
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123-dB, dynamic range enhancer (DRE)
enabled
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113-dB, DRE disabled
– THD+N: –95 dB
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ADC channel summing mode, DR performance:
– 116-dB, DRE disabled, 2-channel summing
ADC input voltage:
– Differential, 2-VRMS full-scale inputs
– Single-ended, 1-VRMS full-scale inputs
ADC sample rate (fS) = 8 kHz to 768 kHz
Programmable channel settings:
– Channel gain: 0 dB to 42 dB, 0.5-dB steps
– Digital volume control: –100 dB to 27 dB
– Gain calibration with 0.1-dB resolution
– Phase calibration with 163-ns resolution
Programmable microphone bias or supply voltage
generation
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The TLV320ADC6120 is specified from –40°C to
+125°C, and is offered in a 20-pin WQFN package.
Device Information(1)
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PART NUMBER
PACKAGE
BODY SIZE (NOM)
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Low-latency signal processing filter selection
Programmable HPF and biquad digital filters
Automatic gain controller (AGC)
3.00 mm × 3.00 mm with
0.5-mm pitch
TLV320ADC6120
WQFN (20)
(1) For all available packages, see the package option
addendum at the end of the data sheet.
Voice activity detection (VAD)
I2C control interface
Integrated high-performance audio PLL
Automatic clock divider setting configurations
Audio serial data interface:
– Format: TDM, I2S, or left-justified (LJ)
– Word length: 16 bits, 20 bits, 24 bits, or 32 bits
– Master or slave interface
Single-supply operation: 3.3 V or 1.8 V
I/O-supply operation: 3.3 V or 1.8 V
Power consumption for 1.8-V AVDD supply:
Digital PDM Microphones
Interface 4-channel
PLL and Clock
Generation
IN1P
IN1M
GPIO1
FSYNC
BCLK
Programmable
Stereo ADC
with Front-End
PGA
Audio Serial
Interface
Digital Filters,
Biquads, AGC
and DRE
IN2P_GPI1
(TDM, I2S, LJ)
SDOUT
IN2M_GPO1
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SDA
SCL
MICBIAS_GPI2
VREF
MICBIAS, Regulators and
Voltage Reference
I2C Control Interface
– 9.5 mW/channel at 48-kHz sample rate
2 Applications
Thermal Pad
(VSS)
AVDD
DREG
IOVDD
AREG
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Smart speakers
IP network cameras
Professional microphones and wireless systems
Video conference systems
Simplified Block Diagram
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.