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TLC7733QDR PDF预览

TLC7733QDR

更新时间: 2024-11-16 12:15:51
品牌 Logo 应用领域
德州仪器 - TI 电源电路电源管理电路光电二极管监控信息通信管理
页数 文件大小 规格书
36页 1614K
描述
Micropower Supply Voltage Supervisors

TLC7733QDR 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Active零件包装代码:SOIC
包装说明:SOP, SOP8,.25针数:8
Reach Compliance Code:compliantECCN代码:EAR99
HTS代码:8542.39.00.01Factory Lead Time:6 weeks
风险等级:0.64其他特性:POWER-ON RESET GENERATOR
可调阈值:NO模拟集成电路 - 其他类型:POWER SUPPLY SUPPORT CIRCUIT
JESD-30 代码:R-PDSO-G8JESD-609代码:e4
长度:4.9 mm湿度敏感等级:1
信道数量:1功能数量:1
端子数量:8最高工作温度:125 °C
最低工作温度:-40 °C封装主体材料:PLASTIC/EPOXY
封装代码:SOP封装等效代码:SOP8,.25
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
峰值回流温度(摄氏度):260电源:2/6 V
认证状态:Not Qualified座面最大高度:1.75 mm
子类别:Power Management Circuits最大供电电流 (Isup):0.016 mA
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:BICMOS温度等级:AUTOMOTIVE
端子面层:Nickel/Palladium/Gold (Ni/Pd/Au)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
阈值电压标称:+2.93V处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:3.9 mmBase Number Matches:1

TLC7733QDR 数据手册

 浏览型号TLC7733QDR的Datasheet PDF文件第2页浏览型号TLC7733QDR的Datasheet PDF文件第3页浏览型号TLC7733QDR的Datasheet PDF文件第4页浏览型号TLC7733QDR的Datasheet PDF文件第5页浏览型号TLC7733QDR的Datasheet PDF文件第6页浏览型号TLC7733QDR的Datasheet PDF文件第7页 
TLC7701, TLC7725, TLC7703  
TLC7733, TLC7705  
www.ti.com  
SLVS087M DECEMBER 1994REVISED MARCH 2012  
Micropower Supply Voltage Supervisors  
Check for Samples: TLC7701, TLC7725, TLC7703 , TLC7733, TLC7705  
1
FEATURES  
DRB PACKAGE  
Power-On Reset Generator  
Automatic Reset Generation After Voltage  
Drop  
Precision Voltage Sensor  
Temperature-Compensated Voltage Reference  
Programmable Delay Time by External  
Capacitor  
Supply Voltage Range . . . 2 V to 6 V  
Defined RESET Output from VDD 1 V  
Power-Down Control Support for Static RAM  
With Battery Backup  
Maximum Supply Current of 16 µA  
Power Saving Totem-Pole Outputs  
Temperature Range . . . Up to –55°C to 125°C  
APPLICATIONS  
Medical Imaging  
DESCRIPTION  
The TLC77xx family of micropower supply voltage  
supervisors provide reset control, primarily in  
microcomputer and microprocessor systems.  
During power-on, RESET is asserted when VDD  
reaches  
1 V. After minimum VDD (2 V) is  
established, the circuit monitors SENSE voltage and  
keeps the reset outputs active as long as SENSE  
voltage (VI(SENSE)  
) remains below the threshold  
voltage. An internal timer delays return of the output  
to the inactive state to ensure proper system reset.  
The delay time, td, is determined by an external  
capacitor:  
td = 2.1 × 104 × CT  
Where  
CT is in farads  
td is in seconds  
SPACER  
Except for the TLC7701, which can be customized with two external resistors, each supervisor has a fixed sense  
threshold voltage set by an internal voltage divider. When SENSE voltage drops below the threshold voltage, the  
outputs become active and stay in that state until SENSE voltage returns above threshold voltage and the delay  
time, td, has expired.  
1
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of  
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.  
PRODUCTION DATA information is current as of publication date.  
Copyright © 1994–2012, Texas Instruments Incorporated  
Products conform to specifications per the terms of the Texas  
Instruments standard warranty. Production processing does not  
necessarily include testing of all parameters.  
 

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